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Computer Arithmetic, IEEE Symposium on

Apr. 14 1999 to Apr. 16 1999

Adelaide, Australia

ISSN: 1063-6889

ISBN: 0-7695-0116-8

Table of Contents

Proceedings 14th IEEE Symposium on Computer Arithmetic (Cat. No.99CB36336)Freely available from IEEE.pp. iii-iii
ForewordFreely available from IEEE.pp. viii
Symposium CommitteeFreely available from IEEE.pp. ix
Program CommitteeFreely available from IEEE.pp. x
List of ReviewersFreely available from IEEE.pp. xi
Invited Talk, Chair: Israel Koren
Computer Arithmetic - A Programmer's PerspectiveFull-text access may be available. Sign in or learn about subscription options.pp. 2
by Richard P. Brent
Processor Enhancements, Chair: Peter Kornerup
New Algorithms for Improved Transcendental Functions on IA-64Full-text access may be available. Sign in or learn about subscription options.pp. 4
by Shane Story, Ping Tak, Peter Tang
Processor Enhancements, Chair: Peter Kornerup
A Low-Power, High-Speed Implementation of a PowerPC(tm) Microprocessor Vector ExtensionFull-text access may be available. Sign in or learn about subscription options.pp. 12
by M.S. Schmookler, M. Putrino, A. Mather, J. Tyler, H.V. Nguyen, C. Roth, M. Sharma, M.N. Pham, J. Lent
Addition, Chair: Neil Weste
Intermediate Variable Encodings that Enable Multiplexor-Based Implementations of Two Operand AdditionFull-text access may be available. Sign in or learn about subscription options.pp. 22
by Dhananjay S. Phatak, I. Koren
Addition, Chair: Neil Weste
A Family of AddersFull-text access may be available. Sign in or learn about subscription options.pp. 30
by S. Knowles
Addition, Chair: Neil Weste
Reduced Latency IEEE Floating-Point Standard Adder ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 35
by A. Beaumont-Smith, N. Burgess, S. Lefrere, C.C. Lim
Division, Chair: Renato Stefanelli
On the Design of High-Radix On-Line Division for Long PrecisionFull-text access may be available. Sign in or learn about subscription options.pp. 44
by Alexandre F. Tenca, Milos D. Ercegovac
Division, Chair: Renato Stefanelli
Boosting Very-High Radix Division with Prescaling and Selection by RoundingFull-text access may be available. Sign in or learn about subscription options.pp. 52
by Paolo Montuschi, Tomas Lang
Division, Chair: Renato Stefanelli
Low-Power Division: Comparison among Implementations of Radix 4, 8 and 16Full-text access may be available. Sign in or learn about subscription options.pp. 60
by Alberto Nannarelli, Tomas Lang
Cryptography and Graphics, Chair: Milos Ercegovac
Montgomery Modular Exponentiation on Reconfigurable HardwareFull-text access may be available. Sign in or learn about subscription options.pp. 70
by Thomas Blum
Cryptography and Graphics, Chair: Milos Ercegovac
Moduli for Testing Implementations of the RSA CryptosystemFull-text access may be available. Sign in or learn about subscription options.pp. 78
by Colin D. Walter
Cryptography and Graphics, Chair: Milos Ercegovac
Digit-Recurrence Algorithm for Computing Euclidean Norm of a 3-D VectorFull-text access may be available. Sign in or learn about subscription options.pp. 86
by Naofumi Takagi, Seiji Kuwahara
Divide and Square Root, Chair: Atsuki Inoue
Correctness Proofs Outline for Newton-Raphson Based Floating-Point Divide and Square Root AlgorithmsFull-text access may be available. Sign in or learn about subscription options.pp. 96
by Marius A. Cornea-Hasegan, Roger A. Golliver, Peter Markstein
Divide and Square Root, Chair: Atsuki Inoue
Floating Point Division and Square Root Algorithms and Implementation in the AMD-K7 MicroprocessorFull-text access may be available. Sign in or learn about subscription options.pp. 106
by Stuart F. Oberman
Divide and Square Root, Chair: Atsuki Inoue
Series Approximation Methods for Divide and Square Root in the Power3(TM) ProcessorFull-text access may be available. Sign in or learn about subscription options.pp. 116
by Martin S Schmookler, Ramesh C. Agarwal, Fred G. Gustavson
Divide and Square Root, Chair: Atsuki Inoue
High-Speed Inverse Square RootsFull-text access may be available. Sign in or learn about subscription options.pp. 124
by Michael J. Schulte, Kent E. Wires
Number Systems, Chair: Colin Walter
Arithmetic with Signed Analog DigitsFull-text access may be available. Sign in or learn about subscription options.pp. 134
by A. Saed, M. Ahmadi, G.A. Jullien
Number Systems, Chair: Colin Walter
A 32-Bit Logarithmic Arithmetic Unit and its Performance Compared to Floating-PointFull-text access may be available. Sign in or learn about subscription options.pp. 142
by J.N. Coleman, E.I. Chester
Number Systems, Chair: Colin Walter
Necessary and Sufficient Conditions for Parallel, Constant Time Conversion and AdditionFull-text access may be available. Sign in or learn about subscription options.pp. 152
by Peter Kornerup
Residue Number Systems, Chair: Graham Jullien
Efficient VLSI Implementation of Modulo (2^n=B11) Addition and MultiplicationFull-text access may be available. Sign in or learn about subscription options.pp. 158
by Reto Zimmermann
Residue Number Systems, Chair: Graham Jullien
A Reverse Converter for the 4-moduli Superset {2^n-1, 2^n, 2^n+1, 2^(n+1)+1}Full-text access may be available. Sign in or learn about subscription options.pp. 168
by M. Bhardwaj, T. Srikanthan, C. T. Clarke
Residue Number Systems, Chair: Graham Jullien
VLSI Costs of Arithmetic Parallelism: A Residue Reverse Conversion PerspectiveFull-text access may be available. Sign in or learn about subscription options.pp. 176
by M. Bhardwaj, T. Srikanthan, C.T. Clarke
CORDIC Algorithms, Chair: Jeong Lee
Interval Sine and Cosine Functions Computation Based on Variable-Precision CORDIC AlgorithmFull-text access may be available. Sign in or learn about subscription options.pp. 186
by J. Hormigo, J. Villalba, E.L. Zapata
CORDIC Algorithms, Chair: Jeong Lee
Complex Logarithmic Number System Arithmetic Using High-Radix Redundant CORDIC AlgorithmsFull-text access may be available. Sign in or learn about subscription options.pp. 194
by D. Lewis
CORDIC Algorithms, Chair: Jeong Lee
Very-High Radix CORDIC Vectoring with Scalings and Selection by RoundingFull-text access may be available. Sign in or learn about subscription options.pp. 204
by Elisardo Antelo, Tomas Lang, Javier D. Bruguera
Multiplication and Rounding, Chair: William McAllister
Area ? Delay (A T) Efficient Multiplier Based on an Intermediate Hybrid Signed-Digit (HSD-1) RepresentationFull-text access may be available. Sign in or learn about subscription options.pp. 216
by Jeng-Jong J. Lue, Dhananjay S. Phatak
Multiplication and Rounding, Chair: William McAllister
A Comparison of Three Rounding Algorithms for IEEE Floating-Point MultiplicationFull-text access may be available. Sign in or learn about subscription options.pp. 225
by Guy Even, Peter-M. Seidel
Multiplication and Rounding, Chair: William McAllister
On Infinitely Precise Rounding for Division, Square Root, Reciprocal and Square Root ReciprocalFull-text access may be available. Sign in or learn about subscription options.pp. 233
by Cristina Iordache, David W. Matula
Multiplication and Rounding, Chair: William McAllister
Number-Theoretic Test Generation for Directed RoundingFull-text access may be available. Sign in or learn about subscription options.pp. 241
by Michael Parks
Floating Point, Chair: Stuart F. Oberman
Multiplications of Floating Point ExpansionsFull-text access may be available. Sign in or learn about subscription options.pp. 250
by Marc Daumas
Floating Point, Chair: Stuart F. Oberman
The S/390 G5 Floating Point Unit Supporting Hex and Binary ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 258
by Eric M. Schwarz, Ronald M. Smith, Christopher A. Krygowski
Floating Point, Chair: Stuart F. Oberman
Floating-Point Unit in Standard Cell Design with 116 Bit Wide DataflowFull-text access may be available. Sign in or learn about subscription options.pp. 266
by Guenter Gerwig, Michael Kroener
Floating Point, Chair: Stuart F. Oberman
Author IndexFreely available from IEEE.pp. 274
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