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2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)

Oct. 1 2014 to Oct. 3 2014

Amsterdam, Netherlands

Table of Contents

[Front matter]Freely available from IEEE.pp. i-xvi
Estimating the effect of single-event upsets on microprocessorsFull-text access may be available. Sign in or learn about subscription options.pp. 185-190
by Cristian Constantinescu, Srini Krishnamoorthy, Tuyen Nguyen
A system-level scheme for resistance drift tolerance of a multilevel phase change memoryFull-text access may be available. Sign in or learn about subscription options.pp. 63-68
by Pilin Junsangsri, Jie Han, Fabrizio Lombardi
Designs and analysis of non-volatile memory cells for single event upset (SEU) toleranceFull-text access may be available. Sign in or learn about subscription options.pp. 69-74
by Wei Wei, Fabrizio Lombardi, Kazuteru Namba
Scheduling algorithm in datapath synthesis for long duration transient fault toleranceFull-text access may be available. Sign in or learn about subscription options.pp. 128-133
by Tsuyoshi Iwagaki, Tatsuya Nakaso, Ryoko Ohkubo, Hideyuki Ichihara, Tomoo Inoue
Power droop reduction during Launch-On-Shift scan-based logic BISTFull-text access may be available. Sign in or learn about subscription options.pp. 21-26
by M. Omana, D. Rossi, E. Beniamino, C. Metra, C. Tirumurti, R. Galivanche
Machine learning-based techniques for incremental functional diagnosis: A comparative analysisFull-text access may be available. Sign in or learn about subscription options.pp. 246-251
by Cristiana Bolchini, Luca Cassano
Exploiting dynamic partial reconfiguration for on-line on-demand testing of permanent faults in reconfigurable systemsFull-text access may be available. Sign in or learn about subscription options.pp. 203-208
by Domenico Sorrenti, Dario Cozzi, Sebastian Korf, Luca Cassano, Jens Hagemeyer, Mario Porrmann, Cinzia Bernardeschi
Artificial intelligence based task mapping and pipelined scheduling for checkpointing on real time systems with imperfect fault detectionFull-text access may be available. Sign in or learn about subscription options.pp. 134-140
by Anup Das, Akash Kumar, Bharadwaj Veeravalli
TSV-to-TSV inductive coupling-aware coding scheme for 3D Network-on-ChipFull-text access may be available. Sign in or learn about subscription options.pp. 92-97
by Ashkan Eghbal, Pooria M. Yaghini, Siavash S. Yazdi, Nader Bagherzadeh
Automated formal approach for debugging dividers using dynamic specificationFull-text access may be available. Sign in or learn about subscription options.pp. 264-269
by Mohammad-Hashem Haghbayan, Bijan Alizadeh, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen
Characterization of data retention faults in DRAM devicesFull-text access may be available. Sign in or learn about subscription options.pp. 9-14
by Angelo Bacchini, Marco Rovatti, Gianluca Furano, Marco Ottavi
Decreasing FIT with diverse triple modular redundancy in SRAM-based FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 153-158
by Lucas A. Tambara, Fernanda Lima Kastensmidt, Paolo Rech, Christopher Frost
Characterizing soft error vulnerability of cache coherence protocols for chip-multiprocessorsFull-text access may be available. Sign in or learn about subscription options.pp. 15-20
by Chuanlei Zheng, Shuai Wang
Diagnostic self-test for dynamically scheduled superscalar processors based on reconfiguration techniques for handling permanent faultsFull-text access may be available. Sign in or learn about subscription options.pp. 27-32
by Mario Scholzel, Tobias Koal, Heinrich T. Vierhaus
A fault injection methodology and infrastructure for fast single event upsets emulation on Xilinx SRAM-based FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 159-164
by Stefano Di Carlo, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
A probabilistic analysis of resilient reconfigurable designsFull-text access may be available. Sign in or learn about subscription options.pp. 141-146
by A. Malek, S. Tzilis, D. A. Khan, I. Sourdis, G. Smaragdos, C. Strydis
Energy-efficient concurrent testing approach for many-core systems in the dark silicon ageFull-text access may be available. Sign in or learn about subscription options.pp. 270-275
by Mohammad-Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
Design and implementation of a self-healing processor on SRAM-based FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 165-170
by Mihalis Psarakis, Alexandros Vavousis, Cristiana Bolchini, Antonio Miele
A built-in calibration system with a reduced FFT engine for linearity optimization of low power LNAFull-text access may be available. Sign in or learn about subscription options.pp. 222-227
by Yongsuk Choi, Chun-hsiang Chang, In-Seok Jung, Marvin Onabajo, Yong-Bin Kim
A 12-bit 32MS/s SAR ADC using built-in self calibration technique to minimize capacitor mismatchFull-text access may be available. Sign in or learn about subscription options.pp. 276-280
by In-Seok Jung, Yong-Bin Kim
Unifying scan compressionFull-text access may be available. Sign in or learn about subscription options.pp. 191-196
by Swapnil Bahl, Shreyans Rungta, Shray Khullar, Rohit Kapur, Anshuman Chandra, Salvatore Talluto, Pramod Notiyath, Ajay Rajagopalan
Fault injection in the process descriptor of a Unix-based operating systemFull-text access may be available. Sign in or learn about subscription options.pp. 281-286
by Bartolomeo Montrucchio, Maurizio Rebaudengo, Alejandro Velasco
An instance-based SER analysis in the presence of PVTA variationsFull-text access may be available. Sign in or learn about subscription options.pp. 287-292
by Bahareh Farahani, Saeed Safari
A heuristic path selection method for small delay defects testFull-text access may be available. Sign in or learn about subscription options.pp. 252-257
by Paniz Foroutan, Mehdi Kamal, Zainalabedin Navabi
Exploiting Intel TSX for fault-tolerant execution in safety-critical systemsFull-text access may be available. Sign in or learn about subscription options.pp. 197-202
by Florian Haas, Sebastian Weis, Stefan Metzlaff, Theo Ungerer
Protecting cryptographic hardware against malicious attacks by nonlinear robust codesFull-text access may be available. Sign in or learn about subscription options.pp. 40-45
by Victor Tomashevich, Yaara Neumeier, Raghavan Kumar, Osnat Keren, Ilia Polian
GPGPUs ECC efficiency and efficacyFull-text access may be available. Sign in or learn about subscription options.pp. 209-215
by Daniel A. G. Oliveira, Paolo Rech, Laercio L. Pilla, Philippe O. A. Navaux, Luigi Carro
Rescuing healthy cores against disabled routersFull-text access may be available. Sign in or learn about subscription options.pp. 98-103
by Masoumeh Ebrahimi, Junshi Wang, Letian Huang, Masoud Daneshtalab, Axel Jantsch
Domino effect protection on dataflow error detection and recoveryFull-text access may be available. Sign in or learn about subscription options.pp. 147-152
by Tiago A. O. Alves, Leandro A. J. Marzulo, Sandip Kundi, Felipe M. G. Franca
Exploration of system availability during software-based self-testing in many-core systems under test latency constraintsFull-text access may be available. Sign in or learn about subscription options.pp. 33-39
by Michael A. Skitsas, Chrysostomos A. Nicopoulos, Maria K. Michael
Preemptive multi-bit IJTAG testing with reconfigurable infrastructureFull-text access may be available. Sign in or learn about subscription options.pp. 293-298
by Shahrzad Keshavarz, Amirreza Nekooei, Zainalabedin Navabi
On the in-field functional testing of decode units in pipelined RISC processorsFull-text access may be available. Sign in or learn about subscription options.pp. 299-304
by P. Bernardi, R. Cantoro, L. Ciganda, E. Sanchez, M. Sonza Reorda, S. De Luca, R. Meregalli, A. Sansonetti
A data recomputation approach for reliability improvement of scratchpad memory in embedded systemsFull-text access may be available. Sign in or learn about subscription options.pp. 228-233
by Hossein Sayadi, Hamed Farbeh, Amir Mahdi Hosseini Monazzah, Seyed Ghassem Miremadi
Performance sensor for tolerance and predictive detection of delay-faultsFull-text access may be available. Sign in or learn about subscription options.pp. 110-115
by J. Semiao, D. Saraiva, C. Leong, A. Romao, M. B. Santos, I. C. Teixeira, J. P. Teixeira
Reliability estimation at block-level granularity of spin-transfer-torque MRAMsFull-text access may be available. Sign in or learn about subscription options.pp. 75-80
by S. Di Carlo, M. Indaco, P. Prinetto, Elena I. Vatajelu, R. Rodriguez-Montanes, J. Figueras
Using memristor state change behavior to identify faults in photovoltaic arraysFull-text access may be available. Sign in or learn about subscription options.pp. 86-91
by Jimson Mathew, Marco Ottavi, Yunfan Yang, Dhiraj K. Pradhan
Towards an adaptable bit-width NMR voter for multiple error maskingFull-text access may be available. Sign in or learn about subscription options.pp. 258-263
by Thiago Berticelli Lo, Fernanda Lima Kastensmidt, Antonio Carlos Schneider Beck
CSST: Preventing distribution of unlicensed and rejected ICs by untrusted foundry and assemblyFull-text access may be available. Sign in or learn about subscription options.pp. 46-51
by Md. Tauhidur Rahman, Domenic Forte, Quihang Shi, Gustavo K. Contreras, Mohammad Tehranipoor
SAM: A comprehensive mechanism for accessing embedded sensors in modern SoCsFull-text access may be available. Sign in or learn about subscription options.pp. 240-245
by Miao Tony He, Mohammad Tehranipoor
Reusing the IEEE 1500 design for test infrastructure for security monitoring of Systems-on-ChipFull-text access may be available. Sign in or learn about subscription options.pp. 52-56
by Jerry Backer, David Hely, Ramesh Karri
Aging analysis for recycled FPGA detectionFull-text access may be available. Sign in or learn about subscription options.pp. 171-176
by Halit Dogan, Domenic Forte, Mark Mohammad Tehranipoor
Fault tolerant and highly adaptive routing for 2D NoCsFull-text access may be available. Sign in or learn about subscription options.pp. 104-109
by Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Masoumeh Ebrahimi, Mark Zwolinski
Diagnosis of segment delay defects with current sensingFull-text access may be available. Sign in or learn about subscription options.pp. 122-127
by Wisam Aljubouri, Ahish Mysore Somashekar, Themistoklis Haniotakis, Spyros Tragoudas
Shortest path reduction in a class of uniform fault tolerant networksFull-text access may be available. Sign in or learn about subscription options.pp. 234-239
by Prashant D. Joshi, Said Hamdioui
Improved correction for hot pixels in digital imagersFull-text access may be available. Sign in or learn about subscription options.pp. 116-121
by Glenn H. Chapman, Rohit Thomas, Rahul Thomas, Israel Koren, Zahava Koren
Security methods in fault tolerant modified line graph based networksFull-text access may be available. Sign in or learn about subscription options.pp. 57-62
by Prashant D. Joshi, Said Hamdioui
Triggering Trojans in SRAM circuits with X-propagationFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
by Senwen Kan, Jennifer Dworak
A runtime manager for gracefully degrading SoCsFull-text access may be available. Sign in or learn about subscription options.pp. 216-221
by Stavros Tzilis, Ioannis Sourdis
Oxide based resistive RAM: ON/OFF resistance analysis versus circuit variabilityFull-text access may be available. Sign in or learn about subscription options.pp. 81-85
by H. Aziza, H. Ayari, S. Onkaraiah, J-M. Portal, M. Moreau, M. Bocquet
Analytic reliability evaluation for fault-tolerant circuit structures on FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 177-184
by Jahanzeb Anwer, Marco Platzner
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