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Field-Programmable Custom Computing Machines, Annual IEEE Symposium on

Apr. 19 1995 to Apr. 21 1995

Napa Valley, California

ISBN: 0-8186-7086-X

Table of Contents

A MOdular and Reprogrammable Real-time Processing Hardware, MORRPHFull-text access may be available. Sign in or learn about subscription options.pp. 11-19
CommitteesFreely available from IEEE.pp. viii
Session 1: Custom Computing Platforms
A FCCM for dataflow (spreadsheet) programsFull-text access may be available. Sign in or learn about subscription options.pp. 0002
Session 1: Custom Computing Platforms
MORRPH: a modular and reprogrammable real-time processing hardwareFull-text access may be available. Sign in or learn about subscription options.pp. 0011
Session 1: Custom Computing Platforms
Architecture of a FPGA-based coprocessor: the PAR-1Full-text access may be available. Sign in or learn about subscription options.pp. 0020
Session 2: Custom Computing Platforms
Teramac-configurable custom computingFull-text access may be available. Sign in or learn about subscription options.pp. 0032
Session 2: Custom Computing Platforms
Common processor element packaging for CHAMPFull-text access may be available. Sign in or learn about subscription options.pp. 0039
Session 2: Custom Computing Platforms
Enable ++: A Second Generation FPGA ProcessorFull-text access may be available. Sign in or learn about subscription options.pp. 0045
Session 3: Signal Transport
Design and implementation of a multicomputer interconnection network using FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 0056
Session 3: Signal Transport
Routability improvement using dynamic interconnect architectureFull-text access may be available. Sign in or learn about subscription options.pp. 0061
Session 3: Signal Transport
Reconfigurable real-time signal transport system using custom FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 0068
Session 4: Run-Time Reconfiguration
Design methodologies for partially reconfigured systemsFull-text access may be available. Sign in or learn about subscription options.pp. 0078
Session 4: Run-Time Reconfiguration
Issues in wireless video coding using run-time-reconfigurable FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 0085
Session 4: Run-Time Reconfiguration
Run time reconfiguration of FPGA for scanning genomic databasesFull-text access may be available. Sign in or learn about subscription options.pp. 0090
Session 4: Run-Time Reconfiguration
A dynamic instruction set computerFull-text access may be available. Sign in or learn about subscription options.pp. 0099
Session 5: Applications I
Emulating static faults using a Xilinx based emulatorFull-text access may be available. Sign in or learn about subscription options.pp. 0110
Session 5: Applications I
Acceleration of template-based ray casting for volume visualization using FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 0116
Session 5: Applications I
Flexible image acquisition using reconfigurable hardwareFull-text access may be available. Sign in or learn about subscription options.pp. 0125
Session 6: Compiler Issues I
The Transmogrifier C hardware description language and compiler for FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 0136
Session 6: Compiler Issues I
Architectural descriptions for FPGA circuitsFull-text access may be available. Sign in or learn about subscription options.pp. 0145
Session 6: Compiler Issues I
Quantitative analysis of floating point arithmetic on FPGA based custom computing machinesFull-text access may be available. Sign in or learn about subscription options.pp. 0155
Session 7: Compiler Issues II
A declarative approach to incremental custom computingFull-text access may be available. Sign in or learn about subscription options.pp. 0164
Session 7: Compiler Issues II
A C++ compiler for FPGA custom execution units synthesisFull-text access may be available. Sign in or learn about subscription options.pp. 0173
Session 7: Compiler Issues II
Implementing a genetic algorithm on a parallel custom computing machineFull-text access may be available. Sign in or learn about subscription options.pp. 0180
Session 8: Applications II
Rapid prototyping of a RISC architecture for implementation in FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 0190
Session 8: Applications II
FPGA-based transformable computers for fast digital signal processingFull-text access may be available. Sign in or learn about subscription options.pp. 0197
Session 8: Applications II
Convolution on Splash 2Full-text access may be available. Sign in or learn about subscription options.pp. 0204
Session 8: Applications II
Hidden Markov modeling and fuzzy controllers in FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 0214
Session 8: Applications II
Authors IndexFreely available from IEEE.pp. 0222
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