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Field-Programmable Custom Computing Machines, Annual IEEE Symposium on

Apr. 29 2001 to May 2 2001

Rohnert Park, California

ISBN: 0-7695-2667-5

Table of Contents

The 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines - Table of ContentsFreely available from IEEE.pp. v,vi,vii,viii
Session 1: DSP
Parallelization of MATLAB Applications for a Multi-FPGA SystemFull-text access may be available. Sign in or learn about subscription options.pp. 1-9
by Anshuman Nayak, Malay Haldar, Alok Choudhary, Prith Banerjee
Session 1: DSP
Automatic Mapping of Multiple Applications to Multiple Adaptive Computing SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 10-20
by Sze-Wei Ong, Nabil Kerkiz, Bernadeta Srijanto, Chandra Tan, Mike Langston, Danny Newport, Don Bouldin
Pilchard - a reconfigurable computing platform with memory slot interfaceFull-text access may be available. Sign in or learn about subscription options.pp. 170,171,172,173,174,175,176,177,178,179
by P.H.W. Leong, M.P. Leong, O.Y.H. Cheung, T. Tung, C.M. Kwok, M.Y. Wong, K.H. Lee
Session 1: DSP
Parameterized Module Generator for an FPGA-Based Electronic CochleaFull-text access may be available. Sign in or learn about subscription options.pp. 21-30
by M. P. Leong, C. T. Jin, P. H. W. Leong
Session 2: Tools
Novel Algorithm Combining Temporal Partitioning and Sharing of Functional UnitsFull-text access may be available. Sign in or learn about subscription options.pp. 31-40
by Jo?o M. P. Cardoso
Session 2: Tools
Instrumenting Bitstreams for Debugging FPGA CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 41-50
by Paul Graham, Brent Nelson, Brad Hutchings
Session 3: Arithmetic
The Multiple Wordlength ParadigmFull-text access may be available. Sign in or learn about subscription options.pp. 51-60
by George A. Constantinides, Peter Y.K. Cheung, Wayne Luk
Session 3: Arithmetic
FPGA Implementation of Pipelined On-Line Scheme for 3-D Vector NormalizationFull-text access may be available. Sign in or learn about subscription options.pp. 61-70
by Zhijun Huang, Miloš D. Ercegovac
Session 3: Arithmetic
A Reconfigurable Co-Processor for Variable Long Precision Arithmetic Using Indian AlgorithmsFull-text access may be available. Sign in or learn about subscription options.pp. 71-80
by Ranjani Parthasarathi, Easwaran Raman, Karthik Sankaranarayanan, Lakshmi N Chakrapani
Session 4: JBits
An Efficient Content-Addressable Memory Implementation Using Dynamic RoutingFull-text access may be available. Sign in or learn about subscription options.pp. 81-90
by Philip B. James-Roxby, Daniel J. Downs
Session 4: JBits
Lava and JBits: From HDL to Bitstream in SecondsFull-text access may be available. Sign in or learn about subscription options.pp. 91-100
by Satnam Singh, Phil James-Roxby
Session 5: Architecture I
Architecture and Application of PLATO, A Reconfigurable Active Network PlatformFull-text access may be available. Sign in or learn about subscription options.pp. 101-110
by Apostolos Dollas, Dionisios Pnevmatikatos, Nikolaos Aslanides, Stamatios Kavvadias, Euripides Sotiriades, Sotirios Zogopoulos, Kyprianos Papademetriou, Nikolaos Chrysos, Konstantinos Harteros, Emanouil Antonidakis, Nikolaos Petrakis
JBits ™ Design AbstractionsFull-text access may be available. Sign in or learn about subscription options.pp. 251,252
by C. Patterson, S.A. Guccione
Session 5: Architecture I
Totem: Custom Reconfigurable Array GenerationFull-text access may be available. Sign in or learn about subscription options.pp. 111-119
by Katherine Compton, Scott Hauck
Session 5: Architecture I
A Cellular Automata System with FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 120-129
by Tomoyoshi Kobori, Tsutomu Maruyama, Tsutomu Hoshino
Session 6: Fault Tolerance
A Fault-Tolerance Scheme for a MIN-Based Multi-Sensor SystemFull-text access may be available. Sign in or learn about subscription options.pp. 130-136
by Monica Alderighi, Fabio Casini, Sergio D'Angelo, Davide Salvi, Giacomo R. Sechi
Session 6: Fault Tolerance
Column-Based Precompiled Configuration Techniques for FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 137-146
by Wei-Je Huang, Edward J. McCluskey
Session 7: Architecture II
Configuration Compression for Virtex FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 147-159
by Zhiyuan Li, Scott Hauck
Session 7: Architecture II
An 8x8 IDCT Implementation on an FPGA-Augmented TriMediaFull-text access may be available. Sign in or learn about subscription options.pp. 160-169
by Mihai Sima, Sorin Cotofana, Jos T. J. van Eijndhoven, Stamatis Vassiliadis, Kees Vissers
Session 7: Architecture II
Pilchard — A Reconfigurable Computing Platform with Memory Slot InterfaceFull-text access may be available. Sign in or learn about subscription options.pp. 170-179
by P. H. W. Leong, M. P. Leong, O. Y. H. Cheung, T. Tung, C. M. Kwok, M. Y. Wong, K. H. Lee
Session 8: Applications I
Acceleration of a 2D-FFT on an Adaptable Computing ClusterFull-text access may be available. Sign in or learn about subscription options.pp. 180-189
by Keith D. Underwood, Ron R. Sass, Walter B. Ligon, III
Session 8: Applications I
Design and Implementation of a Generic 2-D Biorthogonal Discrete Wavelet Transform on an FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 190-198
by A. Benkrid, D. Crookes, K. Benkrid
Session 9: Image Processing
An Application-Specific Compiler for High-Speed Binary Image MorphologyFull-text access may be available. Sign in or learn about subscription options.pp. 199-208
by Scott Hemmert, Brad Hutchings, Anshul Malvi
Session 9: Image Processing
One-Step Compilation of Image Processing Applications to FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 209-218
by A. P. W. Böhm, B. Draper, W. Najjar, J. Hammes, R. Rinker, M. Chawathe, C. Ross
Session 9: Image Processing
High Level Programming for FPGA Based Image and Video Processing Using Hardware SkeletonsFull-text access may be available. Sign in or learn about subscription options.pp. 219-226
by K. Benkrid, D. Crookes, J. Smith, A. Benkrid
Session 10: Applications II
Fast Regular Expression Matching Using FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 227-238
by Reetinder Sidhu, Viktor K. Prasanna
Session 10: Applications II
A Configurable Hardware/Software Approach to SAT SolvingFull-text access may be available. Sign in or learn about subscription options.pp. 239-248
by J. T. de Sousa, J. M. da Silva, M. Abramovici
Manufacturing shop-floor supercomputer for distributed simulation and controlFull-text access may be available. Sign in or learn about subscription options.pp. 302-303
by J. Patel, V. Prabhu
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