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Field-Programmable Custom Computing Machines, Annual IEEE Symposium on

Sept. 22 2002 to Sept. 24 2002

Napa, California

ISSN: 1082-3409

ISBN: 0-7695-1801-X

Table of Contents

Introduction
Conference OrganizersFreely available from IEEE.pp. x
Session 1: Applications I
Image Registration of Real-Time Video Data Using the SONIC Reconfigurable Computer PlatformFull-text access may be available. Sign in or learn about subscription options.pp. 3
Session 1: Applications I
A Massively Parallel RC4 Key Search EngineFull-text access may be available. Sign in or learn about subscription options.pp. 13
Session 1: Applications I
An FPGA Implementation of Triangle Mesh DecompressionFull-text access may be available. Sign in or learn about subscription options.pp. 22
Session 2: Networking I
Single-Chip Gigabit Mixed-Version IP Router on Virtex-II ProFull-text access may be available. Sign in or learn about subscription options.pp. 35
Session 2: Networking I
Control and Configuration Software for a Reconfigurable Networking Hardware PlatformFull-text access may be available. Sign in or learn about subscription options.pp. 45
Session 3: Tool I
Peer-to-Peer Hardware-Software Interfaces for Reconfigurable FabricsFull-text access may be available. Sign in or learn about subscription options.pp. 57
Session 3: Tool I
PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 67
Session 3: Tool I
Coarse-Grain Pipelining on Multiple FPGA ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 77
Session 4: Template Matching
FPGA-Based Template Matching Using Distance TransformsFull-text access may be available. Sign in or learn about subscription options.pp. 89
Session 4: Template Matching
Reconfigurable Shape-Adaptive Template Matching ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 98
Session 5: Networking II
Assisting Network Intrusion Detection with Reconfigurable HardwareFull-text access may be available. Sign in or learn about subscription options.pp. 111
Session 5: Networking II
GRIP: A Reconfigurable Architecture for Host-Based Gigabit-Rate Packet ProcessingFull-text access may be available. Sign in or learn about subscription options.pp. 121
Session 5: Networking II
Design and Analysis of a Layer Seven Network Processor Accelerator Using Reconfigurable LogicFull-text access may be available. Sign in or learn about subscription options.pp. 131
Session 6: Architecture I
Using On-Chip Configurable Logic to Reduce Embedded System Software EnergyFull-text access may be available. Sign in or learn about subscription options.pp. 143
Session 6: Architecture I
Queue Machines: Hardware Compilation in HardwareFull-text access may be available. Sign in or learn about subscription options.pp. 152
Session 7: Applications II
Custom Computing Machines for the Set Covering ProblemFull-text access may be available. Sign in or learn about subscription options.pp. 163
Session 7: Applications II
Analysis and Implementation of the Discrete Element Method Using a Dedicated Highly Parallel Architecture in Reconfigurable ComputingFull-text access may be available. Sign in or learn about subscription options.pp. 173
Session 7: Applications II
Using Floating-Point Arithmetic on FPGAs to Accelerate Scientific N-Body SimulationsFull-text access may be available. Sign in or learn about subscription options.pp. 182
Session 8: Architecture II
Mobile Memory: Improving Memory Locality in Very Large Reconfigurable FabricsFull-text access may be available. Sign in or learn about subscription options.pp. 195
Session 8: Architecture II
Hardware-Assisted Fast RoutingFull-text access may be available. Sign in or learn about subscription options.pp. 205
Session 9: Tools II
Optimum Wordlength AllocationFull-text access may be available. Sign in or learn about subscription options.pp. 219
Session 9: Tools II
Pr?cis: A Design-Time Precision Analysis ToolFull-text access may be available. Sign in or learn about subscription options.pp. 229
Session 9: Tools II
Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 239
Session 10: Image Compression
Hyperspectral Image Compression on Reconfigurable PlatformsFull-text access may be available. Sign in or learn about subscription options.pp. 251
Session 10: Image Compression
MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64Full-text access may be available. Sign in or learn about subscription options.pp. 261
Poster Session 1
On Sparse Matrix-Vector Multiplication with FPGA-Based SystemFull-text access may be available. Sign in or learn about subscription options.pp. 273
Poster Session 1
Implementing a Simple Continuous Speech Recognition System on an FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 275
Poster Session 1
RACER — A Rapid Prototyping Accelerator for Pulsed Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 277
Poster Session 1
Accelerating Radiosity Calculations Using Reconfigurable PlatformsFull-text access may be available. Sign in or learn about subscription options.pp. 279
Poster Session 1
On Implementing a Configware/Software SAT SolverFull-text access may be available. Sign in or learn about subscription options.pp. 282
Poster Session 1
Reconfigurable Object Detection in FLIR Image SequencesFull-text access may be available. Sign in or learn about subscription options.pp. 284
Poster Session 1
TCP-Stream Reassembly and State Tracking in HardwareFull-text access may be available. Sign in or learn about subscription options.pp. 286
Poster Session 2
Fast and Guaranteed C Compilation onto the PACT-XPP™ Reconfigurable Computing PlatformFull-text access may be available. Sign in or learn about subscription options.pp. 291
Poster Session 2
Module Generators Driving the Compilation for Adaptive Computing SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 293
Poster Session 2
System-Level Modelling and Implementation Technique for Run-Time Reconfigurable SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 295
Poster Session 2
Tabu Search with Intensification Strategy for Functional Partitioning in Hardware-Software CodesignFull-text access may be available. Sign in or learn about subscription options.pp. 297
Poster Session 2
Automatic Latency-Optimal Design of FPGA-Based Systolic ArraysFull-text access may be available. Sign in or learn about subscription options.pp. 299
Poster Session 2
Compiling ATR Probing Codes for Execution on FPGA HardwareFull-text access may be available. Sign in or learn about subscription options.pp. 301
Poster Session 2
The Effects of Datapath Placement and C-Slow Retiming on Three Computational BenchmarksFull-text access may be available. Sign in or learn about subscription options.pp. 303
Poster Session 3
A Scalable FPGA-Based Custom Computing Machine for a Medical Image ProcessingFull-text access may be available. Sign in or learn about subscription options.pp. 307
Poster Session 3
The Design of the Amalgam Reconfigurable ClusterFull-text access may be available. Sign in or learn about subscription options.pp. 309
Poster Session 3
Mapping Algorithms to the Amalgam Programmable-Reconfigurable ProcessorFull-text access may be available. Sign in or learn about subscription options.pp. 311
Poster Session 4
Customising Floating-Point DesignsFull-text access may be available. Sign in or learn about subscription options.pp. 315
Poster Session 4
Mapping Multi-Mode Circuits to LUT-Based FPGA Using Embedded MUXesFull-text access may be available. Sign in or learn about subscription options.pp. 318
Author Index
Author IndexFreely available from IEEE.pp. 321
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