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Field-Programmable Custom Computing Machines, Annual IEEE Symposium on

Apr. 28 2013 to Apr. 30 2013

Seattle, WA, USA USA

ISBN: 978-1-4673-6005-0

Table of Contents

Papers
[Title page i]Freely available from IEEE.pp. i
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[Title page iii]Freely available from IEEE.pp. iii
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[Copyright notice]Freely available from IEEE.pp. iv
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Table of contentsFreely available from IEEE.pp. v-ix
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A Message from the General Chair and Program ChairFreely available from IEEE.pp. x
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FCCM 2013 Organizing CommitteeFreely available from IEEE.pp. xi
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FCCM 2013 Program CommitteeFreely available from IEEE.pp. xii-xiii
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Additional reviewersFreely available from IEEE.pp. xiv
Reconfigurable computing in the era of post-silicon scaling [panel discussion]Freely available from IEEE.pp. xvi-xvi
by Eric Chung, Doug Burger, Mike Butts, Jan Gray, Chuck Thacker, Kees Vissers, John Wawrzynek
Parallel Computation of Skyline QueriesFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
by Louis Woods, Gustavo Alonso, Jens Teubner
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Minerva: Accelerating Data Analysis in Next-Generation SSDsFull-text access may be available. Sign in or learn about subscription options.pp. 9-16
by Arup De, Maya Gokhale, Rajesh Gupta, Steven Swanson
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Accelerating Join Operation for Relational Databases with FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 17-20
by Robert J. Halstead, Bharat Sukhwani, Hong Min, Mathew Thoennes, Parijat Dube, Sameh Asaad, Balakrishna Iyer
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Boosting Memory Performance of Many-Core FPGA Device through Dynamic Precedence GraphFull-text access may be available. Sign in or learn about subscription options.pp. 21-24
by Yu Bai, Abigail Fuentes, Michael Riera, Mohammed Alawad, Mingjie Lin
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Acceleration of SQL Restrictions and Aggregations through FPGA-Based Dynamic Partial ReconfigurationFull-text access may be available. Sign in or learn about subscription options.pp. 25-28
by Christopher Dennl, Daniel Ziener, Jurgen Teich
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Accuracy-Performance Tradeoffs on an FPGA through OverclockingFull-text access may be available. Sign in or learn about subscription options.pp. 29-36
by Kan Shi, David Boland, George A. Constantinides
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Safe Overclocking of Tightly Coupled CGRAs and Processor Arrays using RazorFull-text access may be available. Sign in or learn about subscription options.pp. 37-44
by Alexander Brant, Ameer Abdelhadi, Douglas H.H. Sim, Shao Lin Tang, Michael Xi Yue, Guy G.F. Lemieux
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Escaping the Academic Sandbox: Realizing VPR Circuits on Xilinx DevicesFull-text access may be available. Sign in or learn about subscription options.pp. 45-52
by Eddie Hung, Fatemeh Eslami, Steven J.E. Wilton
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A Case for Heterogeneous Technology-Mapping: Soft Versus Hard MultiplexersFull-text access may be available. Sign in or learn about subscription options.pp. 53-56
by Madhura Purnaprajna, Paolo Ienne
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Accurate Thermal-Profile Estimation and Validation for FPGA-Mapped CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 57-60
by Abdulazim Amouri, Hussam Amrouch, Thomas Ebi, Jorg Henkel, Mehdi Tahoori
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On-chip Context Save and Restore of Hardware Tasks on Partially Reconfigurable FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 61-64
by Aurelio Morales-Villanueva, Ann Gordon-Ross
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A High Throughput No-Stall Golomb-Rice Hardware DecoderFull-text access may be available. Sign in or learn about subscription options.pp. 65-72
by Roger Moussalli, Walid Najjar, Xi Luo, Amna Khan
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Image Segmentation Using Hardware Forest ClassifiersFull-text access may be available. Sign in or learn about subscription options.pp. 73-80
by Neil Pittman, Alessandro Forin, Antonio Criminisi, Jamie Shotton, Atabak Mahram
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A Reconfigurable Architecture for 1-D and 2-D Discrete Wavelet TransformFull-text access may be available. Sign in or learn about subscription options.pp. 81-84
by Qing Sun, Jiang Jiang, Yongxin Zhu, Yuzhuo Fu
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High Speed Video Processing Using Fine-Grained Processing on FPGA PlatformFull-text access may be available. Sign in or learn about subscription options.pp. 85-88
by Zhi Ping Ang, Akash Kumar, Yajun Ha
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The Effect of Compiler Optimizations on High-Level Synthesis for FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 89-96
by Qijing Huang, Ruolong Lian, Andrew Canis, Jongsok Choi, Ryan Xi, Stephen Brown, Jason Anderson
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Automating Elimination of Idle Functions by Run-Time ReconfigurationFull-text access may be available. Sign in or learn about subscription options.pp. 97-104
by Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu
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Open-Source Bitstream GenerationFull-text access may be available. Sign in or learn about subscription options.pp. 105-112
by Ritesh Kumar Soni, Neil Steiner, Matthew French
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ShrinkWrap: Compiler-Enabled Optimization and Customization of Soft Memory InterconnectsFull-text access may be available. Sign in or learn about subscription options.pp. 113-116
by Eric S. Chung, Michael K. Papamichael
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PRML: A Modeling Language for Rapid Design Exploration of Partially Reconfigurable FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 117-120
by Rohit Kumar, Ann Gordon-Ross
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Atacama: An Open FPGA-Based Platform for Mixed-Criticality Communication in Multi-segmented Ethernet NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 121-128
by Gonzalo Carvajal, Miguel Figueroa, Robert Trausmuth, Sebastian Fischmeister
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Latency-Optimized Networks for Clustering FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 129-136
by Trevor Bunker, Steven Swanson
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A Range and Scaling Study of an FPGA-Based Digital Wireless Channel EmulatorFull-text access may be available. Sign in or learn about subscription options.pp. 137-144
by Scott Buscemi, Will Kritikos, Ron Sass
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Enabling Hardware Exploration in Software-Defined Networking: A Flexible, Portable OpenFlow SwitchFull-text access may be available. Sign in or learn about subscription options.pp. 145-148
by Asif Khan, Nirav Dave
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An FPGA Based PCI-E Root Complex Architecture for Standalone SOPCsFull-text access may be available. Sign in or learn about subscription options.pp. 149-152
by Yingjie Cao, Yongxin Zhu, Xu Wang, Jiang Jiang, Meikang Qiu
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Application Composition and Communication Optimization in Iterative Solvers Using FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 153-160
by Abid Rafique, Nachiket Kapre, George A. Constantinides
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Parallel Generation of Gaussian Random Numbers Using the Table-Hadamard TransformFull-text access may be available. Sign in or learn about subscription options.pp. 161-168
by David B. Thomas
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Hardware-Software Codesign for Embedded Numerical AccelerationFull-text access may be available. Sign in or learn about subscription options.pp. 169-172
by Ranko Sredojevic, Andrew Wright, Vladimir Stojanovic
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FAssem: FPGA Based Acceleration of De Novo Genome AssemblyFull-text access may be available. Sign in or learn about subscription options.pp. 173-176
by B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan, Dominique Lavenier
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Accelerating the Computation of Induced Dipoles for Molecular Mechanics with Dataflow EnginesFull-text access may be available. Sign in or learn about subscription options.pp. 177-180
by Frederico Pratas, Diego Oriato, Oliver Pell, Ricardo A. Mata, Leonel Sousa
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On Optimizing the Arithmetic Precision of MCMC AlgorithmsFull-text access may be available. Sign in or learn about subscription options.pp. 181-188
by Grigorios Mingas, Farhan Rahman, Christos-Savvas Bouganis
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Exploiting Input Parameter Uncertainty for Reducing Datapath Precision of SPICE Device ModelsFull-text access may be available. Sign in or learn about subscription options.pp. 189-197
by Nachiket Kapre
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Efficient Large Integer Squarers on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 198-201
by Simin Xu, Suhaib A. Fahmy, Ian V. Mcloughlin
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Elementary Function Implementation with Optimized Sub Range Polynomial EvaluationFull-text access may be available. Sign in or learn about subscription options.pp. 202-205
by Martin Langhammer, Bogdan Pasca
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High-Level Description and Synthesis of Floating-Point Accumulators on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 206-209
by Marc-Andre Daigneault, Jean Pierre David
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Reconfigurable Acceleration of Short Read MappingFull-text access may be available. Sign in or learn about subscription options.pp. 210-217
by James Arram, Kuen Hung Tsoi, Wayne Luk, Peiyong Jiang
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An FPGA-Based Data Flow Engine for Gaussian Copula ModelFull-text access may be available. Sign in or learn about subscription options.pp. 218-225
by Huabin Ruan, Xiaomeng Huang, Haohuan Fu, Guangwen Yang, Wayne Luk, Sebastien Racaniere, Oliver Pell, Wenjing Han
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A Delay-based PUF Design Using Multiplexers on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 226
by Miaoqing Huang, Shiming Li
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Binding Hardware IPs to Specific FPGA Device via Inter-twining the PUF Response with the FSM of Sequential CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 227
by Jiliang Zhang, Yaping Lin, Yongqiang Lyu, Ray C.C. Cheung, Wenjie Che, Qiang Zhou, Jinian Bian
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A Soft Coarse-Grained Reconfigurable Array Based High-level Synthesis Methodology: Promoting Design Productivity and Exploring Extreme FPGA FrequencyFull-text access may be available. Sign in or learn about subscription options.pp. 228
by Cheng Liu, Colin Lin Yu, Hayden Kwok-Hay So
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FPGA Simulation Engine for Customized Construction of Neural MicrocircuitFull-text access may be available. Sign in or learn about subscription options.pp. 229
by Jason Cong, Hugh T. Blair, Di Wu
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Global Atmospheric Simulation on a Reconfigurable PlatformFull-text access may be available. Sign in or learn about subscription options.pp. 230
by Lin Gan, Haohuan Fu, Wayne Luk, Chao Yang, Wei Xue, Guangwen Yang
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An Approach to a Fully Automated Partial Reconfiguration Design FlowFull-text access may be available. Sign in or learn about subscription options.pp. 231
by Kizheppatt Vipin, Suhaib A. Fahmy
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A Multithreaded VLIW Soft Processor FamilyFull-text access may be available. Sign in or learn about subscription options.pp. 232
by Kalin Ovtcharov, Ilian Tili, J. Gregory Steffan
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A Configurable Architecture for a Visual Saliency System and Its Application in RetailFull-text access may be available. Sign in or learn about subscription options.pp. 233
by Nandhini Chandramoorthy, Siddarth Advani, Kevin M. Irick, Vijaykrishnan Narayanan
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The Impact of Hardware Communication on a Heterogeneous Computing SystemFull-text access may be available. Sign in or learn about subscription options.pp. 234
by Shanyuan Gao, Bin Huang, Ron Sass
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An Evaluation of High-Performance Embedded Processing on MPPAsFull-text access may be available. Sign in or learn about subscription options.pp. 235
by Zain-ul-Abdin, Bertil Svensson
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A Fast and Accurate FPGA-Based Fault Injection SystemFull-text access may be available. Sign in or learn about subscription options.pp. 236
by Thomas Schweizer, Dustin Peterson, Johannes M. Kuhn, Tommy Kuhn, Wolfgang Rosenstiel
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Memory Access Scheduling on the Convey HC-1Full-text access may be available. Sign in or learn about subscription options.pp. 237
by Zheming Jin, Jason D. Bakos
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Exploring Manycore Multinode Systems for Irregular Applications with FPGA PrototypingFull-text access may be available. Sign in or learn about subscription options.pp. 238
by Marco Ceriani, Gianluca Palermo, Simone Secchi, Antonino Tumeo, Oreste Villa
Global Control and Storage Synthesis for a System Level Synthesis ApproachFull-text access may be available. Sign in or learn about subscription options.pp. 239-239
by Shuo Li, Nasim Farahini, Ahmed Hemani
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Author indexFreely available from IEEE.pp. 240-241
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[Publisher's information]Freely available from IEEE.pp. 242
Birth and adolescence of reconfigurable computing: a survey of the first 20 years of field-programmable custom computing machinesFull-text access may be available. Sign in or learn about subscription options.
by Kenneth Pocek, Russell Tessier, Andre DeHon
[Combined introductions]Freely available from IEEE.
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