1. Home
  2. Proceedings
  3. ICCAD
  4. ICCAD 2011
Default Cover Image

Computer-Aided Design, International Conference on

Nov. 7 2011 to Nov. 10 2011

San Jose, CA, USA

ISBN: 978-1-4577-1399-6

Table of Contents

Papers
Front matterFreely available from IEEE.pp. 1-2
Papers
Executive committeeFreely available from IEEE.pp. 1-7
Papers
ForewordFreely available from IEEE.pp. 1
Papers
AwardsFreely available from IEEE.pp. 1
Papers
Keynote address: Design of secure systems -- Where are the EDA tools?Freely available from IEEE.pp. 1
by Georg Sigl
Papers
PanelsFreely available from IEEE.pp. 1
Papers
Table of contentsFreely available from IEEE.pp. 1-12
Papers
Author indexFreely available from IEEE.pp. 1-10
Papers
Copyright pageFreely available from IEEE.pp. 1
Papers
Layout decomposition for triple patterning lithographyFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
by Bei Yu, Kun Yuan, Boyang Zhang, Duo Ding, David Z. Pan
Papers
Optimal layout decomposition for double patterning technologyFull-text access may be available. Sign in or learn about subscription options.pp. 9-13
by Xiaoping Tang, Minsik Cho
Papers
A framework for double patterning-enabled designFull-text access may be available. Sign in or learn about subscription options.pp. 14-20
by Rani S. Ghaida, Kanak B. Agarwal, Sani R. Nassif, Xin Yuan, Lars W. Liebmann, Puneet Gupta
Papers
Unequal-error-protection codes in SRAMs for mobile multimedia applicationsFull-text access may be available. Sign in or learn about subscription options.pp. 21-27
by Xuebei Yang, Kartik Mohanram
Papers
Detecting stability faults in sub-threshold SRAMsFull-text access may be available. Sign in or learn about subscription options.pp. 28-33
by Chen-Wei Lin, Hao-Yu Yang, Chin-Yuan Huang, Hung-Hsin Chen, Mango C.-T. Chao
Papers
Pseudo-functional testing for small delay defects considering power supply noise effectsFull-text access may be available. Sign in or learn about subscription options.pp. 34-39
by Feng Yuan, Xiao Liu, Qiang Xu
Papers
A low-power memory architecture with application-aware power management for motion & disparity estimation in Multiview Video CodingFull-text access may be available. Sign in or learn about subscription options.pp. 40-47
by Bruno Zatt, Muhammad Shafique, Sergio Bampi, Jorg Henkel
Papers
Bandwidth-aware reconfigurable cache design with hybrid memory technologiesFull-text access may be available. Sign in or learn about subscription options.pp. 48-55
by Jishen Zhao, Cong Xu, Yuan Xie
Papers
Feedback control based cache reliability enhancement for emerging multicoresFull-text access may be available. Sign in or learn about subscription options.pp. 56-62
by Hui Zhao, Akbar Sharifi, Shekhar Srikantaiah, Mahmut Kandemir
Papers
GPU programming for EDA with OpenCLFull-text access may be available. Sign in or learn about subscription options.pp. 63-66
by Rasit O. Topaloglu, Benedict Gaster
Papers
A SimPLR method for routability-driven placementFull-text access may be available. Sign in or learn about subscription options.pp. 67-73
by Myung-Chul Kim, Jin Hu, Dong-Jin Lee, Igor L. Markov
Papers
Ripple: An effective routability-driven placer by iterative cell movementFull-text access may be available. Sign in or learn about subscription options.pp. 74-79
by Xu He, Tao Huang, Linfu Xiao, Haitong Tian, Guxin Cui, Evangeline F.Y. Young
Papers
Routability-driven analytical placement for mixed-size circuit designsFull-text access may be available. Sign in or learn about subscription options.pp. 80-84
by Meng-Kai Hsu, Sheng Chou, Tzu-Hen Lin, Yao-Wen Chang
Papers
PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designsFull-text access may be available. Sign in or learn about subscription options.pp. 85-90
by Yi-Lin Chuang, Hong-Ting Lin, Tsung-Yi Ho, Yao-Wen Chang, Diana Marculescu
Papers
Efficient analytical macromodeling of large analog circuits by Transfer Function TrajectoriesFull-text access may be available. Sign in or learn about subscription options.pp. 91-94
by Dimitri De Jonghe, Georges Gielen
Papers
Optimal statistical chip dispositionFull-text access may be available. Sign in or learn about subscription options.pp. 95-102
by Vladimir Zolotov, Jinjun Xiong
Papers
Temperature aware statistical static timing analysisFull-text access may be available. Sign in or learn about subscription options.pp. 103-110
by Artem Rogachev, Lu Wan, Deming Chen
Papers
Fast statistical timing analysis for circuits with Post-Silicon Tunable clock buffersFull-text access may be available. Sign in or learn about subscription options.pp. 111-117
by Bing Li, Ning Chen
Papers
Improving shared cache behavior of multithreaded object-oriented applications in multicoresFull-text access may be available. Sign in or learn about subscription options.pp. 118-125
by Mahmut Kandemir, Shekhar Srikantaiah, Seung Woo Son
Papers
CIPARSim: Cache intersection property assisted rapid single-pass FIFO cache simulation techniqueFull-text access may be available. Sign in or learn about subscription options.pp. 126-133
by Mohammad Shihabul Haque, Jorgen Peddersen, Sri Parameswaran
Papers
Cooperative parallelizationFull-text access may be available. Sign in or learn about subscription options.pp. 134-141
by Praveen Yedlapalli, Emre Kultursay, Mahmut T. Kandemir
Papers
Optimizing data locality using array tilingFull-text access may be available. Sign in or learn about subscription options.pp. 142-149
by Wei Ding, Yuanrui Zhang, Jun Liu, Mahmut Kandemir
Papers
Assuring application-level correctness against soft errorsFull-text access may be available. Sign in or learn about subscription options.pp. 150-157
by Jason Cong, Karthik Gururaj
Papers
The role of EDA in digital print automation and infrastructure optimizationFull-text access may be available. Sign in or learn about subscription options.pp. 158-161
by Krishnendu Chakrabarty, Gary Dispoto, Rick Bellamy, Jun Zeng
Papers
Toward efficient spatial variation decomposition via sparse regressionFull-text access may be available. Sign in or learn about subscription options.pp. 162-169
by Wangyang Zhang, Karthik Balakrishnan, Xin Li, Duane Boning, Rob Rutenbar
Papers
REBEL and TDC: Two embedded test structures for on-chip measurements of within-die path delay variationsFull-text access may be available. Sign in or learn about subscription options.pp. 170-177
by Charles Lamech, James Aarestad, Jim Plusquellic, Reza Rad, Kanak Agarwal
Papers
Accelerating aerial image simulation with GPUFull-text access may be available. Sign in or learn about subscription options.pp. 178-184
by Hongbo Zhang, Tan Yan, Martin D. F. Wong, Sanjay J. Patel
Papers
Combined loop transformation and hierarchy allocation for data reuse optimizationFull-text access may be available. Sign in or learn about subscription options.pp. 185-192
by Jason Cong, Peng Zhang, Yi Zou
Papers
High-level synthesis with distributed controller for fast timing closureFull-text access may be available. Sign in or learn about subscription options.pp. 193-199
by Seokhyun Lee, Kiyoung Choi
Papers
Synthesis of parallel binary machinesFull-text access may be available. Sign in or learn about subscription options.pp. 200-206
by Elena Dubrova
Papers
Chemical-mechanical polishing aware application-specific 3D NoC designFull-text access may be available. Sign in or learn about subscription options.pp. 207-212
by Wooyoung Jang, Ou He, Jae-Seok Yang, David Z. Pan
Papers
Application-aware deadlock-free oblivious routing based on extended turn-modelFull-text access may be available. Sign in or learn about subscription options.pp. 213-218
by Ali Shafiee, Mahdy Zolghadr, Mohammad Arjomand, Hamid Sarbazi-azad
Papers
Co-design of channel buffers and crossbar organizations in NoCs architecturesFull-text access may be available. Sign in or learn about subscription options.pp. 219-226
by Avinash Kodi, Randy Morris, Dominic DiTomaso, Ashwini Sarathy, Ahmed Louri
Papers
Carbon nanotube imperfection-immune digital VLSI: Frequently asked questions updatedFull-text access may be available. Sign in or learn about subscription options.pp. 227-230
by Hai Wei, Jie Zhang, Lan Wei, Nishant Patil, Albert Lin, Max M. Shulaker, Hong-Yu Chen, H.-S. Philip Wong, Subhasish Mitra
Papers
Alternative design methodologies for the next generation logic switchFull-text access may be available. Sign in or learn about subscription options.pp. 231-234
by Davide Sacchetto, Michele De Marchi, Giovanni De Micheli, Yusuf Leblebici
Papers
Progress and outlook for STT-MRAMFull-text access may be available. Sign in or learn about subscription options.pp. 235
by Yiming Huai, Yuchen Zhou, Ioan Tudosa, Roger Malmhall, Rajiv Ranjan, Jing Zhang
Papers
Universal statistical cure for predicting memory lossFull-text access may be available. Sign in or learn about subscription options.pp. 236-239
by Rajiv Joshi, Rouwaida Kanj, Peiyuan Wang, Hai (Helen) Li
Papers
Hybrid CMOS/Magnetic Process Design Kit and application to the design of high-performances non-volatile logic circuitsFull-text access may be available. Sign in or learn about subscription options.pp. 240-245
by Guillaume Prenat, Bernard Dieny, Jean-Pierre Nozieres, Gregory DiPendina, Kholdoun Torki
Papers
Progress in CMOS-memristor integrationFull-text access may be available. Sign in or learn about subscription options.pp. 246-249
by Gilberto Medeiros-Ribeiro, Janice H. Nickel, J. Joshua Yang
Papers
MGR: Multi-level global routerFull-text access may be available. Sign in or learn about subscription options.pp. 250-255
by Yue Xu, Chris Chu
Papers
Congestion analysis for global routing via integer programmingFull-text access may be available. Sign in or learn about subscription options.pp. 256-262
by Hamid Shojaei, Azadeh Davoodi, Jeffrey T. Linderoth
Papers
High-quality global routing for multiple dynamic supply voltage designsFull-text access may be available. Sign in or learn about subscription options.pp. 263-269
by Wen-Hao Liu, Yih-Lang Li, Kai-Yuan Chao
Papers
The future of clock network synthesisFull-text access may be available. Sign in or learn about subscription options.pp. 270
by Cliff Sze
Papers
Myth busters: Microprocessor clocking is from Mars, ASICs clocking is from VenusFull-text access may be available. Sign in or learn about subscription options.pp. 271-275
by Joseph Kozhaya, Phillip Restle, Haifeng Qian
Papers
Clocking design automation in Intel's Core i7 and future designsFull-text access may be available. Sign in or learn about subscription options.pp. 276-278
by Ali M. El-Husseini, Matthew Morrise
Papers
Algorithmic tuning of clock trees and derived non-tree structuresFull-text access may be available. Sign in or learn about subscription options.pp. 279-282
by Igor L. Markov, Dong-Jin Lee
Papers
Doppler: DPL-aware and OPC-friendly gridless detailed routing with mask density balancingFull-text access may be available. Sign in or learn about subscription options.pp. 283-289
by Yen-Hung Lin, Yong-Chan Ban, David Z. Pan, Yih-Lang Li
Papers
A jumper insertion algorithm under antenna ratio and timing constraintsFull-text access may be available. Sign in or learn about subscription options.pp. 290-297
by Xin Gao, Luca Macchiarulo
Papers
Exploring high throughput computing paradigm for global routingFull-text access may be available. Sign in or learn about subscription options.pp. 298-305
by Yiding Han, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
Papers
Escape routing for staggered-pin-array PCBsFull-text access may be available. Sign in or learn about subscription options.pp. 306-309
by Yuan-Kai Ho, Hsu-Chieh Lee, Yao-Wen Chang
Papers
Modeling the computational efficiency of 2-D and 3-D silicon processors for early-chip planningFull-text access may be available. Sign in or learn about subscription options.pp. 310-317
by Matthew Grange, Axel Jantsch, Roshan Weerasekera, Dinesh Pamunuwa
Papers
The STeTSiMS STT-RAM simulation and modeling systemFull-text access may be available. Sign in or learn about subscription options.pp. 318-325
by Clinton W. Smullen, Anurag Nigam, Sudhanva Gurumurthi, Mircea R. Stan
Papers
Massively parallel programming models used as hardware description languages: The OpenCL caseFull-text access may be available. Sign in or learn about subscription options.pp. 326-333
by Muhsen Owaida, Nikolaos Bellas, Christos D. Antonopoulos, Konstantis Daloukas, Charalambos Antoniadis
Papers
Neuromorphic modeling abstractions and simulation of large-scale cortical networksFull-text access may be available. Sign in or learn about subscription options.pp. 334-338
by Jeffrey L. Krichmar, Nikil Dutt, Jayram M. Nageswaran, Micah Richert
Papers
A framework for accelerating neuromorphic-vision algorithms on FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 810-813
by M. DeBole, A. Al Maashri, M. Cotter, C-L. Yu, C. Chakrabarti, V. Narayanan
Papers
A heterogeneous accelerator platform for multi-subject voxel-based brain network analysisFull-text access may be available. Sign in or learn about subscription options.pp. 339-344
by Yu Wang, Mo Xu, Ling Ren, Xiaorui Zhang, Di Wu, Yong He, Ningyi Xu, Huazhong Yang
Papers
Fast statistical model of TiOFull-text access may be available. Sign in or learn about subscription options.pp. 345-352
by Miao Hu, Hai Li, Robinson E. Pino
Papers
Accelerated statistical simulation via on-demand Hermite spline interpolationsFull-text access may be available. Sign in or learn about subscription options.pp. 353-360
by Rouwaida Kanj, Tong Li, Rajiv Joshi, Kanak Agarwal, Ali Sadigh, David Winston, Sani Nassif
Papers
Structure preserving reduced-order modeling of linear periodic time-varying systemsFull-text access may be available. Sign in or learn about subscription options.pp. 361-366
by Ting Mei, Heidi Thornquist, Eric Keiter, Scott Hutchinson
Papers
ModSpec: An open, flexible specification framework for multi-domain device modellingFull-text access may be available. Sign in or learn about subscription options.pp. 367-374
by David Amsallem, Jaijeet Roychowdhury
Papers
Delay optimization using SOP balancingFull-text access may be available. Sign in or learn about subscription options.pp. 375-382
by Alan Mishchenko, Robert Brayton, Stephen Jang, Victor Kravets
Papers
Match and replace -- A functional ECO engine for multi-error circuit rectificationFull-text access may be available. Sign in or learn about subscription options.pp. 383-388
by Shao-Lun Huang, Wei-Hsun Lin, Chung-Yang (Ric) Huang
Papers
Towards completely automatic decoder synthesisFull-text access may be available. Sign in or learn about subscription options.pp. 389-395
by Hsiou-Yuan Liu, Yen-Cheng Chou, Chen-Hsuan Lin, Jie-Hong R. Jiang
Papers
On rewiring and simplification for canonicity in threshold logic circuitsFull-text access may be available. Sign in or learn about subscription options.pp. 396-403
by Pin-Yi Kuo, Chun-Yao Wang, Ching-Yi Huang
Papers
Inferring assertion for complementary synthesisFull-text access may be available. Sign in or learn about subscription options.pp. 404-411
by ShengYu Shen, Ying Qin, JianMin Zhang
Papers
Statistical aging analysis with process variation considerationFull-text access may be available. Sign in or learn about subscription options.pp. 412-419
by Sangwoo Han, Joohee Choung, Byung-Su Kim, Bong Hyun Lee, Hungbok Choi, Juho Kim
Papers
A new method for multiparameter robust stability distribution analysis of linear analog circuitsFull-text access may be available. Sign in or learn about subscription options.pp. 420-427
by Changhao Yan, Sheng-Guo Wang, Xuan Zeng
Papers
Failure diagnosis of asymmetric aging under NBTIFull-text access may be available. Sign in or learn about subscription options.pp. 428-433
by Jyothi Bhaskarr Velamala, Venkatesa Ravi, Yu Cao
Papers
In-system and on-the-fly clock tuning mechanism to combat lifetime performance degradationFull-text access may be available. Sign in or learn about subscription options.pp. 434-441
by Zahra Lak, Nicola Nicolici
Papers
Online clock skew tuning for timing speculationFull-text access may be available. Sign in or learn about subscription options.pp. 442-447
by Rong Ye, Feng Yuan, Qiang Xu
Papers
Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochipsFull-text access may be available. Sign in or learn about subscription options.pp. 448-455
by Tsung-Wei Huang, Tsung-Yi Ho, Krishnendu Chakrabarty
Papers
Defect-tolerant logic implementation onto nanocrossbars by exploiting mapping and morphing simultaneouslyFull-text access may be available. Sign in or learn about subscription options.pp. 456-462
by Yehua Su, Wenjing Rao
Papers
Device-architecture co-optimization of STT-RAM based memory for low power embedded systemsFull-text access may be available. Sign in or learn about subscription options.pp. 463-470
by Cong Xu, Dimin Niu, Xiaochun Zhu, Seung H. Kang, Matt Nowak, Yuan Xie
Papers
STT-RAM cell design optimization for persistent and non-persistent error rate reduction: A statistical design viewFull-text access may be available. Sign in or learn about subscription options.pp. 471-477
by Yaojun Zhang, Xiaobin Wang, Yiran Chen
Papers
2011 TAU power grid simulation contest: Benchmark suite and resultsFull-text access may be available. Sign in or learn about subscription options.pp. 478-481
by Zhuo Li, Raju Balasubramanian, Frank Liu, Sani Nassif
Papers
PowerRush: A linear simulator for power gridFull-text access may be available. Sign in or learn about subscription options.pp. 482-487
by Jianlei Yang, Zuowei Li, Yici Cai, Qiang Zhou
Papers
Fast static analysis of power grids: Algorithms and implementationsFull-text access may be available. Sign in or learn about subscription options.pp. 488-493
by Zhiyu Zeng, Tong Xu, Zhuo Feng, Peng Li
Papers
On the preconditioner of conjugate gradient method -- A power grid simulation perspectiveFull-text access may be available. Sign in or learn about subscription options.pp. 494-497
by Chung-Han Chou, Nien-Yu Tsai, Hao Yu, Che-Rung Lee, Yiyu Shi, Shih-Chieh Chang
Papers
PTrace: Derivative-free local tracing of bicriterial design tradeoffsFull-text access may be available. Sign in or learn about subscription options.pp. 498-502
by Amith Singhee
Papers
A methodology for local resonant clock synthesis using LC-assisted local clock buffersFull-text access may be available. Sign in or learn about subscription options.pp. 503-506
by Walter J. Condley, Xuchu Hu, Matthew R. Guthaus
Papers
A corner stitching compliant BFull-text access may be available. Sign in or learn about subscription options.pp. 507-511
by Hui-Fang Tsao, Pang-Yen Chou, Shih-Lun Huang, Yao-Wen Chang, Mark Po-Hung Lin, Duan-Ping Chen, Dick Liu
Papers
Heterogeneous BFull-text access may be available. Sign in or learn about subscription options.pp. 512-516
by Pang-Yen Chou, Hung-Chih Ou, Yao-Wen Chang
Papers
Fast analog layout prototyping for nanometer design migrationFull-text access may be available. Sign in or learn about subscription options.pp. 517-522
by Yi-Peng Weng, Hung-Ming Chen, Tung-Chieh Chen, Po-Cheng Pan, Chien-Hung Chen, Wei-Zen Chen
Papers
Model order reduction of fully parameterized systems by recursive least square optimizationFull-text access may be available. Sign in or learn about subscription options.pp. 523-530
by Zheng Zhang, Ibrahim M. Elfadel, Luca Daniel
Papers
Fast poisson solver preconditioned method for robust power grid analysisFull-text access may be available. Sign in or learn about subscription options.pp. 531-536
by Jianlei Yang, Yici Cai, Qiang Zhou, Jin Shi
Papers
Modeling and estimation of power supply noise using linear programmingFull-text access may be available. Sign in or learn about subscription options.pp. 537-542
by Farshad Firouzi, Saman Kiamehr, Mehdi B. Tahoori
Papers
Power grid analysis with hierarchical support graphsFull-text access may be available. Sign in or learn about subscription options.pp. 543-547
by Xueqian Zhao, Jia Wang, Zhuo Feng, Shiyan Hu
Papers
Vectorless verification of RLC power grids with transient current constraintsFull-text access may be available. Sign in or learn about subscription options.pp. 548-554
by Xuanxing Xiong, Jia Wang
Papers
Electromigration modeling and full-chip reliability analysis for BEOL interconnect in TSV-based 3D ICsFull-text access may be available. Sign in or learn about subscription options.pp. 555-562
by Mohit Pathak, Jiwoo Pak, David Z. Pan, Sung Kyu Lim
Papers
Full-chip through-silicon-via interfacial crack analysis and optimization for 3D ICFull-text access may be available. Sign in or learn about subscription options.pp. 563-570
by Moongon Jung, Xi Liu, Suresh K. Sitaraman, David Z. Pan, Sung Kyu Lim
Papers
Variation-aware electromigration analysis of power/ground networksFull-text access may be available. Sign in or learn about subscription options.pp. 571-576
by Di-an Li, Malgorzata Marek-Sadowska
Showing 100 out of 134
Load More
Load All