Proceedings. 5th International Symposium on Quality Electronic Design
March 22 2004 to March 24 2004
San Jose, CA, USA
Table of Contents
ISQED Tutorials: Compact Modeling and Analysis for Nanometer-Scale CMOS Design
ISQED Tutorials: Compact Modeling and Analysis for Nanometer-Scale CMOS Design
Session 1A: Physical Design Migration
Session 1A: Physical Design Migration
Session 1A: Physical Design Migration
Session 1B: CMOS Device and Memory
Session 1C: Poster Session
Session 1C: Poster Session
Session 1C: Poster Session
Session 1C: Poster Session
Session 1C: Poster Session
Session 1C: Poster Session
Session 1C: Poster Session
Session 1C: Poster Session
Session 1C: Poster Session
Session 1C: Poster Session
Session 1C: Poster Session
Session 2A: Topics in Printability
Session 2A: Topics in Printability
Session 2B: Package Design and Interaction
Session 2B: Package Design and Interaction
Session 2B: Package Design and Interaction
Session 2C: Test Generation and Application
Session 2C: Test Generation and Application
Session 2C: Test Generation and Application
Session 3A: Modeling and Simulations of Electromigration and Eletromagnetic Effect
Session 3A: Modeling and Simulations of Electromigration and Eletromagnetic Effect
Session 3A: Modeling and Simulations of Electromigration and Eletromagnetic Effect
Session 3A: Modeling and Simulations of Electromigration and Eletromagnetic Effect
Session 3B: Interconnect: Capacitance Extraction and Delay Calculation
Session 3B: Interconnect: Capacitance Extraction and Delay Calculation
Session 3B: Interconnect: Capacitance Extraction and Delay Calculation
Session 3B: Interconnect: Capacitance Extraction and Delay Calculation
Session 3C: Substrate Noise: Analysis and Prevention
Session 3C: Substrate Noise: Analysis and Prevention
Session 3C: Substrate Noise: Analysis and Prevention
Session 3C: Substrate Noise: Analysis and Prevention
Session 3C: Substrate Noise: Analysis and Prevention
Plenary Session II
Session 4A: Interconnect Delay and Coupling
Session 4A: Interconnect Delay and Coupling
Session 4A: Interconnect Delay and Coupling
Session 4B: Analysis of Variations
Session 4B: Analysis of Variations
Session 4B: Analysis of Variations
Session 4C: Layout and Design Techniques for Quality and Reliability
Session 4C: Layout and Design Techniques for Quality and Reliability
Session 4C: Layout and Design Techniques for Quality and Reliability
Session 5A: Analog Testing
Session 5A: Analog Testing
Session 5B: Low Power Design
Session 5B: Low Power Design
Session 5B: Low Power Design
Session 5B: Low Power Design
Session 5C: ESD
Session 6A: DFM Design Techniques
Session 6A: DFM Design Techniques
Session 6A: DFM Design Techniques
Session 6A: DFM Design Techniques
Session 6B: Delay Test Issues