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2003 12th International Conference on Parallel Architectures and Compilation Techniques

Sept. 27 2003 to Oct. 1 2003

New Orleans, Louisiana

ISSN: 1089-795X

ISBN: 0-7695-2021-9

Table of Contents

Proceedings 12th International Conference on Parallel Architectures and Compilation Techniques - PACT 2003Full-text access may be available. Sign in or learn about subscription options.
Introduction
Message from the General ChairsFreely available from IEEE.pp. vii
Introduction
Message from the PC ChairsFreely available from IEEE.pp. viii
Introduction
Organizing CommitteeFreely available from IEEE.pp. ix
Introduction
Program CommitteeFreely available from IEEE.pp. x
Introduction
Steering CommitteeFreely available from IEEE.pp. xi
Introduction
ReviewersFreely available from IEEE.pp. xii
Keynote 1
Single-Chip Multiprocessors: The Rebirth of Parallel ProcessingFull-text access may be available. Sign in or learn about subscription options.pp. 2
Session 1: Multithreading
Constraint Graph Analysis of Multithreaded ProgramsFull-text access may be available. Sign in or learn about subscription options.pp. 4
Session 1: Multithreading
The Impact of Resource Partitioning on SMT ProcessorsFull-text access may be available. Sign in or learn about subscription options.pp. 15
Session 1: Multithreading
Initial Observations of the Simultaneous Multithreading Pentium 4 ProcessorFull-text access may be available. Sign in or learn about subscription options.pp. 26
Session 2: Instruction-Level Parallelism
Efficient Resource Management during Instruction Scheduling for the EPIC ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 36
Session 2: Instruction-Level Parallelism
Instruction Replication: Reducing Delays Due to Inter-PE Communication LatencyFull-text access may be available. Sign in or learn about subscription options.pp. 46
Author indexFreely available from IEEE.pp. 279-279
Session 2: Instruction-Level Parallelism
Y-Branches: When You Come to a Fork in the Road, Take ItFull-text access may be available. Sign in or learn about subscription options.pp. 56
Session 3: Cache Optimizations
Optimizing Program Locality Through CMEs and GAsFull-text access may be available. Sign in or learn about subscription options.pp. 68
Session 3: Cache Optimizations
Miss Rate Prediction across All Program InputsFull-text access may be available. Sign in or learn about subscription options.pp. 79
Session 3: Cache Optimizations
Compiler-Directed Content-Aware Prefetching for Dynamic Data StructuresFull-text access may be available. Sign in or learn about subscription options.pp. 91
Keynote 2
Challenges and New Approaches to Program AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 102
Session 4: Compiler Techniques and Domain-Specific Optimizations
Combining Program Recovery, Auto-Parallelisation and Locality Analysis for C Programs on Multi-Processor Embedded SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 104
Session 4: Compiler Techniques and Domain-Specific Optimizations
Inter-Procedural Loop Fusion, Array Contraction and RotationFull-text access may be available. Sign in or learn about subscription options.pp. 114
Session 4: Compiler Techniques and Domain-Specific Optimizations
Spill Code Minimization by Spill Code MotionFull-text access may be available. Sign in or learn about subscription options.pp. 125
Session 4: Compiler Techniques and Domain-Specific Optimizations
Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPUFull-text access may be available. Sign in or learn about subscription options.pp. 135
Session 5: Logging, Tracing, Profiling
An Efficient Online Path Profiling Framework for Java Just-In-Time CompilersFull-text access may be available. Sign in or learn about subscription options.pp. 148
Session 5: Logging, Tracing, Profiling
Compressing Extended Program Traces Using Value PredictorsFull-text access may be available. Sign in or learn about subscription options.pp. 159
Session 5: Logging, Tracing, Profiling
Using Software Logging to Support Multi-Version Buffering in Thread-Level SpeculationFull-text access may be available. Sign in or learn about subscription options.pp. 170
Session 6: Multiprocessors
Reactive Multi-Word Synchronization for MultiprocessorsFull-text access may be available. Sign in or learn about subscription options.pp. 184
Session 6: Multiprocessors
Design Trade-Offs in High-Throughput Coherence ControllersFull-text access may be available. Sign in or learn about subscription options.pp. 194
Session 6: Multiprocessors
Memory Hierarchy Design for a Multiprocessor Look-up EngineFull-text access may be available. Sign in or learn about subscription options.pp. 206
Keynote 3
Biomedical Computing and VisualizationFull-text access may be available. Sign in or learn about subscription options.pp. 218
Session 7: Application Characterization
Characterizing and Predicting Program Behavior and its VariabilityFull-text access may be available. Sign in or learn about subscription options.pp. 220
Session 7: Application Characterization
Redeeming IPC as a Performance Metric for Multithreaded ProgramsFull-text access may be available. Sign in or learn about subscription options.pp. 232
Session 7: Application Characterization
Picking Statistically Valid and Early Simulation PointsFull-text access may be available. Sign in or learn about subscription options.pp. 244
Session 8: Register Design Issues
Reducing Datapath Energy through the Isolation of Short-Lived OperandsFull-text access may be available. Sign in or learn about subscription options.pp. 258
Session 8: Register Design Issues
Resolving Register Bank Conflicts for a Network ProcessorFull-text access may be available. Sign in or learn about subscription options.pp. 269
Author Index
Author IndexFreely available from IEEE.pp. 279
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