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VLSI Design, International Conference on

Jan. 2 2011 to Jan. 7 2011

Madras, Chennai India

ISSN: 1063-9667

ISBN: 978-0-7695-4348-2

Table of Contents

Papers
Title Page iFreely available from IEEE.pp. i
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Title Page iiiFreely available from IEEE.pp. iii
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Copyright PageFreely available from IEEE.pp. iv
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Table of ContentsFreely available from IEEE.pp. v-x
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Message from the General ChairsFreely available from IEEE.pp. xi
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Message from the Program ChairsFreely available from IEEE.pp. xii-xiii
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Conference Steering CommitteeFreely available from IEEE.pp. xiv
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Conference CommitteeFreely available from IEEE.pp. xv-xvi
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Reviewers: Track Chairs and Sub-committee Members -- VLSI 2011Freely available from IEEE.pp. xvii-xx
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Reviewers -- VLSI 2011Freely available from IEEE.pp. xxi-xxiii
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VLSI Design 2010 -- Best Paper AwardsFreely available from IEEE.pp. xxiv
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VLSI Design Conference HistoryFreely available from IEEE.pp. xxv
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Embedded Systems Design Conference HistoryFreely available from IEEE.pp. xxvi
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VLSI Design 2011 Keynote SpeakersFreely available from IEEE.pp. xxvii
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Keynote Talk 1Freely available from IEEE.pp. xxviii
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Keynote Talk 2Freely available from IEEE.pp. xxix
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Keynote Talk 3Freely available from IEEE.pp. xxx
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Keynote Talk 4Freely available from IEEE.pp. xxxi
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Keynote Talk 5Freely available from IEEE.pp. xxxii-xxxiii
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Keynote Talk 6Freely available from IEEE.pp. xxxiv
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Banquet TalkFreely available from IEEE.pp. xxxv
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Keynote Talk 7Freely available from IEEE.pp. xxxvi
Papers
4×2Gbps Source-Synchronous Transmitter in 45nm CMOSFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by Anant S. Kamath, Vikas Sinha, Sujoy Chakravarty
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Self-Calibrating Equalizer for Optimal Jitter Performance Using On-chip Eye MonitoringFull-text access may be available. Sign in or learn about subscription options.pp. 6-11
by Srinivasaraman Chandrasekaran, Kunal Desai, Arul Sendhil, William Ng
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A New Double Data Rate(DDR) Dual-Mode Duobinary Transmitter ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 12-17
by Mrigank Sharad, Vijaya Sankara Rao P, Pradip Mandal
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An Approach to Tolerate Process Related Variations in Memristor-Based ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 18-23
by Jeyavijayan Rajendran, Harika Maenm, Ramesh Karri, Garrett S. Rose
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A SOI EEPROM Based Configuration Cell with Simple Scrubbing DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 24-29
by Kashfia Haque, Paul Beckett
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Power Scalable Digital Baseband Architecture for IEEE 802.15.4Full-text access may be available. Sign in or learn about subscription options.pp. 30-35
by Satyam Dwivedi, Bharadwaj Amrutur, Navakanta Bhat
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Evolution of Oscillation in a Quadrature OscillatorFull-text access may be available. Sign in or learn about subscription options.pp. 36-40
by Diptendu Ghosh, Ranjit Gharpurey
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Quadrature Error Compensation for Jitter Reduction in High Speed Clock and Data Recovery CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 41-46
by Kunal Desai, Vijay Krishna
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A 1.8GHz Digital PLL in 65nm CMOSFull-text access may be available. Sign in or learn about subscription options.pp. 47-51
by Biman Chattopadhyay, Anant S. Kamath, Gopalkrishna Nayak
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Auxiliary State Machines and Auxiliary Functions: Constructs for Extending AMS AssertionsFull-text access may be available. Sign in or learn about subscription options.pp. 52-57
by Subhankar Mukherjee, Pallab Dasgupta
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Variation-Conscious Formal Timing Verification in RTLFull-text access may be available. Sign in or learn about subscription options.pp. 58-63
by Jayanand Asok Kumar, Shobha Vasudevan
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A Novel Learning Framework for State Space Exploration Based on Search State Extensibility RelationFull-text access may be available. Sign in or learn about subscription options.pp. 64-69
by Maheshwar Chandrasekar, Michael S. Hsiao
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Improved Timing Windows Overlap Check Using Statistical Timing AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 70-75
by Sachin Shrivastava, Harindranath Parameswaran
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An Automated Approach for Minimum Jitter Buffered H-Tree ConstructionFull-text access may be available. Sign in or learn about subscription options.pp. 76-81
by Ayan Mandal, Nikhil Jayakumar, Kalyana Bollapalli, Sunil P. Khatri, Rabi N. Mahapatra
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Interconnected Tile Standing Wave Resonant Oscillator Based Clock Distribution CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 82-87
by Ayan Mandal, Vinay Karkala, Sunil P. Khatri, Rabi N. Mahapatra
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A SPICE Macromodel for the Analysis of Lossy Dispersive Coupled GaAs Interconnect Line SystemFull-text access may be available. Sign in or learn about subscription options.pp. 88-93
by Bhaskar Gopalan
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Statistical Simulation and Modeling of Nano-scale CMOS VCO Using Artificial Neural NetworkFull-text access may be available. Sign in or learn about subscription options.pp. 94-99
by Sipra Mandal, Soumya Pandit
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A Methodology for Automatic Transistor-Level Sizing of CMOS OpAmpsFull-text access may be available. Sign in or learn about subscription options.pp. 100-105
by Praveen K. Meduri, Shirshak K. Dhali
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A Statistical Learning Based Modeling Approach and Its Application in Leakage Library CharacterizationFull-text access may be available. Sign in or learn about subscription options.pp. 106-111
by M. Zhang, R. Häußler, M. Olbrich, H. Kinzelbach, E. Barke
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Cell Library Characterization at Low Voltage Using Non-linear Operating Point Analysis of Local VariationsFull-text access may be available. Sign in or learn about subscription options.pp. 112-117
by Rahul Rithe, Sharon Chou, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha Chandrakasan
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Accurate Estimation of Signal Currents for Reliability Analysis Considering Advanced Waveform-Shape EffectsFull-text access may be available. Sign in or learn about subscription options.pp. 118-123
by Palkesh Jain, Ankit Jain
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Pseudo Concurrent Quad-Band LNA Operating in 900 MHz/1.8 GHz and 900 MHz/2.4 GHz Bands for Multi-standard Wireless ReceiverFull-text access may be available. Sign in or learn about subscription options.pp. 124-129
by Sambit Datta, Ashudeb Dutta, Kunal Datta, Tarun Kanti Bhattacharyya
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Extraction of Aspect Ratio for Non-Manhattan CMOS DevicesFull-text access may be available. Sign in or learn about subscription options.pp. 130-134
by Shiv Kumar, Vinay Chandratre, Sudheer K. Mohammed, C.K. Pithawa
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A Highly Stable Leakage-Based Silicon Physical Unclonable FunctionsFull-text access may be available. Sign in or learn about subscription options.pp. 135-140
by Dinesh Ganta, Vignesh Vivekraja, Kanu Priya, Leyla Nazhandali
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Realizing Cycle Accurate Processor Memory Simulation via Interface AbstractionFull-text access may be available. Sign in or learn about subscription options.pp. 141-146
by Su Myat Min, Jorgen Peddersen, Sri Parameswaran
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AcENoCs: A Configurable HW/SW Platform for FPGA Accelerated NoC EmulationFull-text access may be available. Sign in or learn about subscription options.pp. 147-152
by Swapnil Lotlikar, Vinayak Pai, Paul V. Gratz
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A Library Development Framework for a Coarse Grain Reconfigurable ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 153-158
by Omer Malik, Ahmed Hemani, Muhammad Ali Shami
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A GPU Algorithm for IC Floorplanning: Specification, Analysis and OptimizationFull-text access may be available. Sign in or learn about subscription options.pp. 159-164
by Yiding Han, Koushik Chakraborty, Sanghamitra Roy, Vilasita Kuntamukkala
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Automated Physical Design of Microchip-Based Capillary Electrophoresis SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 165-170
by Yi-Ling Hsieh, Tsung-Yi Ho
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Layout-Aware Solution Preparation for Biochemical Analysis on a Digital Microfluidic BiochipFull-text access may be available. Sign in or learn about subscription options.pp. 171-176
by Sudip Roy, Bhargab B. Bhattacharya, Partha P. Chakrabarti, Krishnendu Chakrabarty
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Dual Code Compression for Embedded SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 177-182
by Kartik Shrivastava, Prabhat Mishra
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A Scalable LDPC Decoder on GPUFull-text access may be available. Sign in or learn about subscription options.pp. 183-188
by Kiran Kumar Abburi
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Self-Immunity Technique to Improve Register File Integrity Against Soft ErrorsFull-text access may be available. Sign in or learn about subscription options.pp. 189-194
by Hussam Amrouch, Joerg Henkel
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Modeling the Effect of Gate Fringing and Dopant Redistribution on the Inverse Narrow Width Effect of Narrow Channel Shallow Trench Isolated MOSFETsFull-text access may be available. Sign in or learn about subscription options.pp. 195-200
by Srabanti Pandit, Chandan Kumar Sarkar
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Development of a Micro-mechanical Logic Inverter for Low Frequency MEMS Sensor InterfacingFull-text access may be available. Sign in or learn about subscription options.pp. 201-207
by Subha Chakraborty, T.K. Bhattacharyya
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Performance Comparison of Thin-Film Transistors Fabricated Using Different Purity Semiconducting NanotubesFull-text access may be available. Sign in or learn about subscription options.pp. 208-213
by K.C. Narasimhamurthy, Roy Paily
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Feedback Based Supply Voltage Control for Temperature Variation Tolerant PUFsFull-text access may be available. Sign in or learn about subscription options.pp. 214-219
by Vignesh Vivekraja, Leyla Nazhandali
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Ensuring On-Die Power Supply Robustness in High-Performance DesignsFull-text access may be available. Sign in or learn about subscription options.pp. 220-225
by Sreekanth Soman, Amit Brahme, Ramakrishnan Venkatraman, Raashid Shaikh, Santhosh Thiyagaraja, Mahendrasing Patil
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A Reconfigurable Processor for Phylogenetic InferenceFull-text access may be available. Sign in or learn about subscription options.pp. 226-231
by Pei Liu, Ahmed Hemani, Kolin Paul
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NoC Based Distributed Partitionable Memory System for a Coarse Grain Reconfigurable ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 232-237
by Muhammad Adeel Tajammul, Muhammad Ali Shami, Ahmed Hemani, Sridharan Moorthi
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Intra-Flit Skew Reduction for Asynchronous Bypass Channel in NoCsFull-text access may be available. Sign in or learn about subscription options.pp. 238-243
by Reeshav Kumar, Yoon Seok Yang, Gwan Choi
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Low Power Asynchronous Data Acquisition Front End for Wireless Body Sensor Area NetworkFull-text access may be available. Sign in or learn about subscription options.pp. 244-249
by Mike Trakimas, Sungkil Hwang, Sameer Sonkusale
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Hardware Implementation of Real-Time Speech Recognition System Using TMS320C6713 DSPFull-text access may be available. Sign in or learn about subscription options.pp. 250-255
by J. Manikandan, B. Venkataramani, K. Girish, H. Karthic, V. Siddharth
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Improving Android Performance and Energy EfficiencyFull-text access may be available. Sign in or learn about subscription options.pp. 256-261
by Tapas Kumar Kundu, Kolin Paul
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Hazard-Aware Directed Transition Fault ATPG for Effective Critical Path TestFull-text access may be available. Sign in or learn about subscription options.pp. 262-267
by V.R. Devanathan, Ishaan Santhosh Shah
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Fault Collapsing Using a Novel Extensibility RelationFull-text access may be available. Sign in or learn about subscription options.pp. 268-273
by Maheshwar Chandrasekar, Michael S. Hsiao
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Optimized Multitone Test Stimulus Driven Diagnosis of RF Transceivers Using Model Parameter EstimationFull-text access may be available. Sign in or learn about subscription options.pp. 274-279
by Aritra Banerjee, Vishwanath Natarajan, Shreyas Sen, Abhijit Chatterjee, Ganesh Srinivasan, Soumendu Bhattacharya
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A Robust and Reconfigurable Multi-mode Power Gating ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 280-285
by Z. Zhang, X. Kavousianos, K. Chakrabarty, Y. Tsiatouhas
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MEMS-Based Power Gating for Highly Scalable Periodic and Event-Driven ProcessingFull-text access may be available. Sign in or learn about subscription options.pp. 286-291
by Michael B. Henry, Robert Lyerly, Leyla Nazhandali, Adam Fruehling, Dimitrios Peroulis
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True Minimum Energy Design Using Dual Below-Threshold Supply VoltagesFull-text access may be available. Sign in or learn about subscription options.pp. 292-297
by Kyungseok Kim, Vishwani D. Agrawal
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LA-LRU: A Latency-Aware Replacement Policy for Variation Tolerant CachesFull-text access may be available. Sign in or learn about subscription options.pp. 298-303
by Aarul Jain, Aviral Shrivastava, Chaitali Chakrabarti
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Variation-Aware TED-Based Approach for Nano-CMOS RTL Leakage OptimizationFull-text access may be available. Sign in or learn about subscription options.pp. 304-309
by S. Banerjee, J. Mathew, D.K. Pradhan, S.P. Mohanty, M. Ciesielski
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VaROT: Methodology for Variation-Tolerant DSP Hardware Design Using Post-Silicon Truncation of Operand WidthFull-text access may be available. Sign in or learn about subscription options.pp. 310-315
by Keerthi Kunaparaju, Seetharam Narasimhan, Swarup Bhunia
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Design of a 20 MHz DC-DC Buck Converter with 84 Percent Efficiency for Portable ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 316-321
by Ashis Maity, Amit Patra, Norihisa Yamamura, Jonathan Knight
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Low Offset, Low Noise, Variable Gain Interfacing Circuit with a Novel Scheme for Sensor Sensitivity and Offset Compensation for MEMS Based, Wheatstone Bridge Type, Resistive Smart SensorFull-text access may be available. Sign in or learn about subscription options.pp. 322-327
by Anupam Dutta, T.K. Bhattacharyya
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A Low-Noise Low-Power Noise-Adaptive Neural Amplifier in 0.13um CMOS TechnologyFull-text access may be available. Sign in or learn about subscription options.pp. 328-333
by Vikram Chaturvedi, Bharadwaj Amrutur
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A General Algorithm for Energy-Aware Dynamic Reconfiguration in Multitasking SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 334-339
by Weixun Wang, Sanjay Ranka, Prabhat Mishra
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Wakeup Time and Wakeup Energy Estimation in Power-Gated Logic ClustersFull-text access may be available. Sign in or learn about subscription options.pp. 340-345
by Vivek T D, Olivier Sentieys, Steven Derrien
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Trading Accuracy for Power with an Underdesigned Multiplier ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 346-351
by Parag Kulkarni, Puneet Gupta, Milos Ercegovac
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Efficient Trace Signal Selection for Post Silicon Validation and DebugFull-text access may be available. Sign in or learn about subscription options.pp. 352-357
by Kanad Basu, Prabhat Mishra
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Trace Buffer-Based Silicon Debug with Lossless CompressionFull-text access may be available. Sign in or learn about subscription options.pp. 358-363
by Sandesh Prabhakar, Rajamani Sethuram, Michael S. Hsiao
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Multiple Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm OptimizationFull-text access may be available. Sign in or learn about subscription options.pp. 364-369
by Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
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Multi-CoDec Configurations for Low Power and High Quality Scan TestFull-text access may be available. Sign in or learn about subscription options.pp. 370-375
by Arvind Jain, Sundarrajan Subramanian, Rubin A. Parekhji, Srivaths Ravi
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Thermal-Aware Test Scheduling Using On-chip Temperature SensorsFull-text access may be available. Sign in or learn about subscription options.pp. 376-381
by Chunhua Yao, Kewal K. Saluja, Parameswaran Ramanathan
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Path Delay Tuning for Performance Gain in the Face of Random Manufacturing VariationsFull-text access may be available. Sign in or learn about subscription options.pp. 382-388
by Kautalya Mishra, Ahmed Faraz, Adit D. Singh
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Author IndexFreely available from IEEE.pp. 389-391
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Publisher InformationFreely available from IEEE.pp. 392
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