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VLSI Design, International Conference on

Jan. 7 2012 to Jan. 11 2012

Hyderbad, India

ISSN: 1063-9667

ISBN: 978-0-7695-4638-4

Table of Contents

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Title Page iFreely available from IEEE.pp. i
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Title Page iiiFreely available from IEEE.pp. iii
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Copyright PageFreely available from IEEE.pp. iv
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Table of ContentsFreely available from IEEE.pp. v-xiii
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Message from the Steering Committee ChairFreely available from IEEE.pp. xiv
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Message from the General ChairFreely available from IEEE.pp. xv
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Silver Jubilee Message from the Conference Founding MemberFreely available from IEEE.pp. xvi
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Message from the Silver Jubilee Special ChairFreely available from IEEE.pp. xvii
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Message from the Silver Jubilee Conference ConvenerFreely available from IEEE.pp. xviii
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Message from the Program ChairsFreely available from IEEE.pp. xix-xx
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Message from the Organizing ChairFreely available from IEEE.pp. xxi
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Message from the Tutorial ChairsFreely available from IEEE.pp. xxii
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Message from the Sponsorship and Exhibits TeamFreely available from IEEE.pp. xxiii
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Message from the President, VLSI Society of IndiaFreely available from IEEE.pp. xxiv-xxv
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VLSI Design Conference Steering Committee (2011)Freely available from IEEE.pp. xxvi
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VLSI Design 2012 Conference CommitteeFreely available from IEEE.pp. xxvii-xxx
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VLSI 2012 Technical Program Committee and ReviewersFreely available from IEEE.pp. xxxi-xxxv
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VLSI Design 2011 Best Paper AwardsFreely available from IEEE.pp. xxxvi
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VLSI Design Conference HistoryFreely available from IEEE.pp. xxxvii
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Embedded Systems Design Conference HistoryFreely available from IEEE.pp. xxxviii
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About the CoverFreely available from IEEE.pp. xxxix
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Keynote SpeakersFreely available from IEEE.pp. xl
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Keynote Talk: A History of the VLSI Design ConferenceFull-text access may be available. Sign in or learn about subscription options.pp. 1-2
by Vishwani D. Agrawal
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Keynote Talk: Semiconductor Industry: Best of Times, Worst of Times, and Nowhere Else I Would Rather Be!Full-text access may be available. Sign in or learn about subscription options.pp. 3-4
by Jaswinder S. Ahuja
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Keynote Talk: A Wireless Sensor a Day Keeps the Doctor AwayFull-text access may be available. Sign in or learn about subscription options.pp. 5-6
by Bert Gyselinckx
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Keynote Talk: The Variability Expeditions: Exploring the Software Stack for Underdesigned Computing MachinesFull-text access may be available. Sign in or learn about subscription options.pp. 7-8
by Rajesh Gupta
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Keynote Talk: Challenges in Automotive Cyber-physical Systems DesignFull-text access may be available. Sign in or learn about subscription options.pp. 9-10
by Samarjit Chakraborty
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Tutorial T1: Design of Mixed-Signal Systems using SystemC AMS ExtensionsFull-text access may be available. Sign in or learn about subscription options.pp. 11-12
by Sumit Adhikari, Markus Damm, Christoph Grimm, François Pecheux
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Tutorial T2: Reversible Logic: Fundamentals and Applications in Ultra-Low Power, Fault Testing and Emerging Nanotechnologies, and Challenges in FutureFull-text access may be available. Sign in or learn about subscription options.pp. 13-15
by Himanshu Thapliyal, Nagarajan Ranganathan
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Tutorial T3: DFM, DFT, Silicon Debug and Diagnosis -- The Loop to Ensure Product YieldFull-text access may be available. Sign in or learn about subscription options.pp. 16-17
by Srikanth Venkataraman, Nagesh Tamarapalli
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Tutorial T4: Intellectual Property Protection and Security in System-on-Chip DesignFull-text access may be available. Sign in or learn about subscription options.pp. 18-19
by Susmita Sur-Kolay, Swarup Bhunia
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Tutorial T5: Advanced Analog-Mixed Signal System and Circuit TechniquesFull-text access may be available. Sign in or learn about subscription options.pp. 20-21
by Pavan Hanumolu, Un-Ku Moon, Terri Fiez
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Tutorial T6: Variability-resistant Software and Hardware for Nano-Scale ComputingFull-text access may be available. Sign in or learn about subscription options.pp. 22-24
by Nikil Dutt, Mani Srivastava, Rajesh Gupta, Subhashish Mitra
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Tutorial T7A: New Modeling Methodologies for Thermal Analysis of 3D ICs and Advanced Cooling Technologies of the FutureFull-text access may be available. Sign in or learn about subscription options.pp. 25-26
by David Atienza, Arvind Shridhar
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Tutorial T7B: Optimally Addressing Verification Constraint Complexity for Effective Functional ConvergenceFull-text access may be available. Sign in or learn about subscription options.pp. 27
by Shankar Hemmady
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Tutorial T8A: Designing Silicon-Photonic Communication Networks for Manycore SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 28
by Ajay Joshi
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Tutorial T8B: Wireless System Design and Systems Engineering ChallengesFull-text access may be available. Sign in or learn about subscription options.pp. 29-30
by Kameswara Rao B, Muralidhar Reddy B, Ravi Kishore B
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Embedded Tutorial ET1: Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial OverviewFull-text access may be available. Sign in or learn about subscription options.pp. 31-32
by Annajirao Garimella, Punith Surkanti, Paul M. Furth
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Embedded Tutorial ET2: Digital Subscriber LineFull-text access may be available. Sign in or learn about subscription options.pp. 33-34
by M Kalyana Kumar Rao, Shantha Kumari PV, Boopalan Sellappan
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Embedded Tutorial ET3: Packaging Trends, Die Package Co-Design Flow and ChallengesFull-text access may be available. Sign in or learn about subscription options.pp. 35
by Siva Kothamasu
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Embedded Tutorial ET4: Advanced Techniques for Programming Networked Embedded SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 36-37
by Vijay Raghunathan
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Panel Discussion: SoC Realization -- A Bridge to New Horizons or a Bridge to Nowhere?Full-text access may be available. Sign in or learn about subscription options.pp. 38
by Sathyam K. Pattanam, P.P. Chakrabarti, Mahesh Mahendale, Srikanth Jadcherla, Seer Akademi, Vikas Gautham, Raju Bala Showry Pudota
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Random Access Analog Memory (RA2M) for Video Signal ApplicationFull-text access may be available. Sign in or learn about subscription options.pp. 39-44
by Nilanjan Chattaraj, Anindya Sundar Dhar
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A 55-mW 300MS/s 8-bit CMOS Parallel Pipeline ADCFull-text access may be available. Sign in or learn about subscription options.pp. 45-50
by Manas Kumar Hati, Tarun K. Bhattacharyya
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A 110-dB Dynamic Range, 76-dB Peak SNR Companding Continuous-Time ?S Modulator for Audio ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 51-56
by Saravana Kumar, Shouri Chatterjee
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Hardware Efficient Architecture for Generating Sine/Cosine WavesFull-text access may be available. Sign in or learn about subscription options.pp. 57-61
by Supriya Aggarwal, Kavita Khare
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Power Aware Hardware Prototyping of Multiclass SVM Classifier Through ReconfigurationFull-text access may be available. Sign in or learn about subscription options.pp. 62-67
by Rajesh A. Patil, Gauri Gupta, Vineet Sahula, A.S. Mandal
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A High Speed FIR Filter Architecture Based on Novel Higher Radix AlgorithmFull-text access may be available. Sign in or learn about subscription options.pp. 68-73
by S.K. Sahoo, K. Srinivasa Reddy
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Impact of Body Bias Based Leakage Power Reduction on Soft Error RateFull-text access may be available. Sign in or learn about subscription options.pp. 74-79
by Warin Sootkaneung, Kewal K. Saluja
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An Area Efficient Diode and On Transistor Interchangeable Power Gating Scheme with Trim Options for Low Power SRAMsFull-text access may be available. Sign in or learn about subscription options.pp. 80-84
by Ankur Goel, Donald Evans, Richard Stephani, Venkateswara Reddy, Dharmendra Rai, Veerabadra Chary, N. Sathisha
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An Energy Efficient Oscillator Frequency Calibration Methodology Using Fraction Phase ComputationFull-text access may be available. Sign in or learn about subscription options.pp. 85-91
by Amitava Ghosh, Isha Das, Achintya Halder
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Self-Induced Supply Noise Reduction Technique in GBPS Rate TransmittersFull-text access may be available. Sign in or learn about subscription options.pp. 92-95
by Nitin Gupta, Tapas Nandy, Phalguni Bala
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Buffer Design and Eye-Diagram Based Characterization of a 20 GS/s CMOS DACFull-text access may be available. Sign in or learn about subscription options.pp. 96-100
by Mohit Singh, Shalabh Gupta
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Analog Processing Based Equalizer for 40 Gbps Coherent Optical Links in 90 nm CMOSFull-text access may be available. Sign in or learn about subscription options.pp. 101-106
by Pawan Kumar Moyade, Nandakumar Nambath, Allmin Ansari, Shalabh Gupta
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HD Resolution Intra Prediction Architecture for H.264 DecoderFull-text access may be available. Sign in or learn about subscription options.pp. 107-112
by Jimit Shah, K.S. Raghunandan, Kuruvilla Varghese
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Design for Security of Block Cipher S-Boxes to Resist Differential Power AttacksFull-text access may be available. Sign in or learn about subscription options.pp. 113-118
by Bodhisatwa Mazumdar, Debdeep Mukhopadhyay, Indranil Sengupta
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Real-time Melodic Accompaniment System for Indian Music Using TMS320C6713Full-text access may be available. Sign in or learn about subscription options.pp. 119-124
by Prateek Verma, Preeti Rao
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Bidirectional Single-Supply Level Shifter with Wide Voltage Range for Efficient Power ManagementFull-text access may be available. Sign in or learn about subscription options.pp. 125-130
by Sujan K. Manohar, Vinod K. Somasundar, Ramakrishnan Venkatasubramanian, Poras T. Balsara
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Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial OverviewFull-text access may be available. Sign in or learn about subscription options.pp. 131-136
by Annajirao Garimella, Punith R. Surkanti, Paul M. Furth
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3-D Parasitic Modeling for Rotary InterconnectsFull-text access may be available. Sign in or learn about subscription options.pp. 137-142
by Vinayak Honkote, Ankit More, Baris Taskin
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Power Aware Post-Manufacture Tuning of MIMO Receiver SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 143-148
by Debashis Banerjee, Shreyas Sen, Shyam Kumar Devarakond, Abhijit Chatterjee
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GPU Implementation of a Programmable Turbo Decoder for Software Defined Radio ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 149-154
by Dhiraj Reddy Nallapa Yoge, Nitin Chandrachoodan
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Run-time Prediction of the Optimal Performance Point in DVS-based Dynamic Thermal ManagementFull-text access may be available. Sign in or learn about subscription options.pp. 155-160
by Junyoung Park, H. Mert Ustun, Jacob A. Abraham
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Temperature-aware Task Partitioning for Real-Time Scheduling in Embedded SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 161-166
by Zhe Wang, Sanjay Ranka, Prabhat Mishra
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Towards Thermal Profiling in CMOS/Memristor Hybrid RRAM ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 167-172
by Cory E. Merkel, Dhireesha Kudithipudi
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CMOS Gas Sensor Array Platform with Fourier Transform Based Impedance SpectroscopyFull-text access may be available. Sign in or learn about subscription options.pp. 173-178
by M. Pramod, Navakanta Bhat, Gaurab Banerjee, Bharadwaj Amrutur, K.N. Bhat, Praveen C. Ramamurthy
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A Compact Temperature Sensor at 1.8µA per Hz Conversion Rate and 1.1 °C Accuracy for SOCsFull-text access may be available. Sign in or learn about subscription options.pp. 179-184
by Subhajit Sen, Dan Babitch, Noshir Dubash
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Analysis of the Pull-In Phenomenon in Microelectromechanical VaractorsFull-text access may be available. Sign in or learn about subscription options.pp. 185-190
by Anindya Lal Roy, Anirban Bhattacharya, Ritesh Ray Chaudhuri, Tarun Kanti Bhattacharyya
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Low-Latency No-Handshake GALS Interfaces for Fast-Receiver LinksFull-text access may be available. Sign in or learn about subscription options.pp. 191-196
by Jean-Michel Chabloz, Ahmed Hemani
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Set-Cover Heuristics for Two-Level Logic MinimizationFull-text access may be available. Sign in or learn about subscription options.pp. 197-202
by Ankit Kagliwal, Shankar Balachandran
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A Rapid Methodology for Multi-mode Communication Circuit GenerationFull-text access may be available. Sign in or learn about subscription options.pp. 203-208
by Liang Tang, Jorgen Peddersen, Sri Parameswaran
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An Integrated CMOS RF Energy Harvester with Differential Microstrip Antenna and On-Chip ChargerFull-text access may be available. Sign in or learn about subscription options.pp. 209-214
by Mahima Arrawatia, Varish Diddi, Harsha Kochar, Maryam Shojaei Baghini, Girish Kumar
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Low-Overhead Maximum Power Point Tracking for Micro-Scale Solar Energy Harvesting SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 215-220
by Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaushik Roy
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Hybrid NEMS-CMOS DC-DC Converter for Improved Area and Power EfficiencyFull-text access may be available. Sign in or learn about subscription options.pp. 221-226
by Sujan K. Manohar, Ramakrishnan Venkatasubramanian, Poras T. Balsara
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A Heuristic Method for Co-optimization of Pin Assignment and Droplet Routing in Digital Microfluidic BiochipFull-text access may be available. Sign in or learn about subscription options.pp. 227-232
by Ritwik Mukherjee, Hafizur Rahaman, Indrajit Banerjee, Tuhina Samanta, Parthasarathi Dasgupta
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Clock Tree Skew Minimization with Structured RoutingFull-text access may be available. Sign in or learn about subscription options.pp. 233-237
by Pinaki Chakrabarti
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Accurate Leakage Estimation for FinFET Standard Cells Using the Response Surface MethodologyFull-text access may be available. Sign in or learn about subscription options.pp. 238-244
by Sourindra Chaudhuri, Prateek Mishra, Niraj K. Jha
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Real-Time, Content Aware Camera -- Algorithm -- Hardware Co-Adaptation for Minimal Power Video EncodingFull-text access may be available. Sign in or learn about subscription options.pp. 245-250
by Joshua W. Wells, Jayaram Natarajan, Abhijit Chatterjee, Irtaza Barlas
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Way Sharing Set Associative Cache ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 251-256
by C.J. Janraj, T. Venkata Kalyan, Tripti Warrier, Madhu Mutyam
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A Novel Encoding Scheme for Low Power in Network on Chip LinksFull-text access may be available. Sign in or learn about subscription options.pp. 257-261
by Deepa N. Sarma, G. Lakshminarayanan, K.V.R. Suryakiran Chavali
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A Power Delivery Network Aware Framework for Synthesis of 3D Networks-on-Chip with Multiple Voltage IslandsFull-text access may be available. Sign in or learn about subscription options.pp. 262-267
by Nishit Kapadia, Sudeep Pasricha
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A Framework for TSV Serialization-aware Synthesis of Application Specific 3D Networks-on-ChipFull-text access may be available. Sign in or learn about subscription options.pp. 268-273
by Sudeep Pasricha
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An Ultra-low Power Symbol Detection Methodology and Its Circuit Implementation for a Wake-up Receiver in Wireless Sensor NodesFull-text access may be available. Sign in or learn about subscription options.pp. 274-279
by Deepak Kumar Meher, Arunkumar Salimath, Achintya Halder
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Low-Power Self Reconfigurable Multiplexer Based Decoder for Adaptive Resolution Flash ADCsFull-text access may be available. Sign in or learn about subscription options.pp. 280-285
by Chetan Vudadha, Goutham Makkena, M. Venkata Swamy Nayudu, P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M.B. Srinivas
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A 1.25GHz 0.8W C66x DSP Core in 40nm CMOSFull-text access may be available. Sign in or learn about subscription options.pp. 286-291
by Raguram Damodaran, Timothy Anderson, Sanjive Agarwala, Rama Venkatasubramanian, Michael Gill, Dhileep Gopalakrishnan, Anthony Hill, Abhijeet Chachad, Dheera Balasubramanian, Naveen Bhoria, Jonathan Tran, Duc Bui, Mujibur Rahman, Shriram Moharil, Matthew Pierson, Steve Mullinnix, Hung Ong, David Thompson, Krishna Gurram, Oluleye Olorode, Nuruddin Mahmood, Jose Flores, Arjun Rajagopal, Soujanya Narnur, Daniel Wu, Alan Hales, Kyle Peavy, Robert Sussman
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A Reconfigurable On-die Traffic Generator in 45nm CMOS for a 48 iA-32 Core Network-on-ChipFull-text access may be available. Sign in or learn about subscription options.pp. 292-297
by Praveen Salihundam, Mohammed Asadullah Khan, Shailendra Jain, Yatin Hoskote, Satish Yada, Shasi Kumar, Vasantha Erraguntla, Sriram Vangal, Nitin Borkar
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Efficient Online RTL Debugging Methodology for Logic Emulation SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 298-303
by Somnath Banerjee, Tushar Gupta
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SCARE: Side-Channel Analysis Based Reverse Engineering for Post-Silicon ValidationFull-text access may be available. Sign in or learn about subscription options.pp. 304-309
by Xinmu Wang, Seetharam Narasimhan, Aswin Krishna, Swarup Bhunia
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Kriging-Assisted Ultra-Fast Simulated-Annealing Optimization of a Clamped Bitline Sense AmplifierFull-text access may be available. Sign in or learn about subscription options.pp. 310-315
by Oghenekarho Okobiah, Saraju P. Mohanty, Elias Kougianos, Oleg Garitselov
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Fast-Accurate Non-Polynomial Metamodeling for Nano-CMOS PLL Design OptimizationFull-text access may be available. Sign in or learn about subscription options.pp. 316-321
by Oleg Garitselov, Saraju P. Mohanty, Elias Kougianos
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Circuit Optimization at 22nm Technology NodeFull-text access may be available. Sign in or learn about subscription options.pp. 322-327
by Angada B. Sachid, P. Paliwal, S. Joshi, M. Shojaei, D. Sharma, V. Rao
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Synthesis of Reversible Circuits Using Heuristic Search MethodFull-text access may be available. Sign in or learn about subscription options.pp. 328-333
by Kamalika Datta, Gaurav Rathi, Indranil Sengupta, Hafizur Rahaman
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Minimum Cost Fault Tolerant Adder Circuits in Reversible Logic SynthesisFull-text access may be available. Sign in or learn about subscription options.pp. 334-339
by Sajib Kumar Mitra, Ahsan Raja Chowdhury
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Width-Aware Fine-Grained Dynamic Supply Gating: A Design Methodology for Low-Power Datapath and MemoryFull-text access may be available. Sign in or learn about subscription options.pp. 340-345
by Lei Wang, Somnath Paul, Swarup Bhunia
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Eliminating Performance Penalty of ScanFull-text access may be available. Sign in or learn about subscription options.pp. 346-351
by Ozgur Sinanoglu
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A Silicon Testing Strategy for Pulse-Width FailuresFull-text access may be available. Sign in or learn about subscription options.pp. 352-357
by Srinivas Vooka, Khushboo Agarwal, Abhijeet Shrivastava, Pranav Murthy, Venkatraman Ramakrishnan
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At-speed Testing of Asynchronous Reset De-assertion FaultsFull-text access may be available. Sign in or learn about subscription options.pp. 358-363
by Arvind Jain, Maheedhar Jalasutram, Srinivas Vooka, Prasun Nair, Neeraj Pradhan
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A Library for Passive Online Verification of Analog and Mixed-Signal CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 364-369
by Debjit Pal, Pallab Dasgupta, Siddhartha Mukhopadhyay
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A Fast Equation Free Iterative Approach to Analog Circuit SizingFull-text access may be available. Sign in or learn about subscription options.pp. 370-375
by Supriyo Maji, Pradip Mandal
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Iterative Performance Model Upgradation in Geometric Programming Based Analog Circuit Sizing for Improved Design AccuracyFull-text access may be available. Sign in or learn about subscription options.pp. 376-381
by Samiran Dam, Pradip Mandal
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