The Organization and Use of Parallel Memories

P. Budnik; D.J. Kuck

doi:10.1109/T-C.1971.223171

IEEE Transactions on Computers

The Organization and Use of Parallel Memories

Dec. 1971, pp. 1566-1569, vol. 20

DOI Bookmark: 10.1109/T-C.1971.223171

Authors

P. Budnik, IEEE
D.J. Kuck

Keywords

Memory Conflicts, Parallel Computer, Parallel Memory, Pipeline Computer, Skewed Array Storage

Abstract

As computer CPUs get faster, primary memories tend to be organized in parallel banks. The fastest machines now being developed can fetch of the order of 100 words in parallel. Unless memory and compiler designers are careful, serious memory conflicts and resulting performance degradation may result. Some of the important questions of design and use of such memories are discussed.

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The Organization and Use of Parallel Memories

Authors

Keywords

Abstract

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