Abstract
Compared to exhaustive testing, pseudo exhaustive testing requires a smaller test size and lesser test time. Dynamic power dissipation accounts for the major share of power dissipation in CMOS circuits. The amount of heat dissipated limits the density of a chip. The test mode power has been proved to be more than the functional power dissipation. In this work, we propose a method to identify the seed Cellular Automata (CA) that dissipates the minimum energy, during test. It has been observed that for many circuits, the variation in energy consumption is upto 83.78% at the maximum (3.86% at the minimum), considering all CA configurations. The variation in peak energy consumption is upto a maximum of 50% ( 8.62% at the minimum) among all CA configurations.