2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum
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Abstract

A low-power graphics LSI is designed and implemented for mobile multimedia applications. The LSI contains a 32bit RISC processor with enhanced MAC, a 3D rendering engine, programmable power optimizer, and 29Mh embedded DRAM. Full 3D graphics pipeline featuring 264Mtexelds texture-mapped 3D graphics as well as 2D MPEG-4 video decoding can be realized while consuming less than 210mW and 12lmm2 chip area. The chip is implemented with 0.16μm pure DRAM process to reduce the fabrication cost. The real-time 3D graphics applications are successfully demonstrated by the fabricated chip on two PDA system boards.
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