2010 19th IEEE Asian Test Symposium
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Abstract

Scan architectures with compression support have remedied the test time and data volume problems of today's sizable designs. On-chip compression of responses enables the transmission of a reduced volume signature information to the ATE, delivering test data volume savings, while it engenders the challenge of retaining test quality. In particular, unknown bits (x's) in responses corrupt other response bits upon being compacted altogether, masking their observation, and hence preventing the manifestation of the fault effects they possess. In this work, we propose the design and utilization of a response compactor that can adapt to the varying density of x's in responses. In the proposed design, fan-out of scan chains to XOR trees within the compactor can be adjusted per pattern/slice so as to minimize the corruption impact of x's. Adaptiveness of the proposed response compactor enhances the observability of scan cells cost-effectively.
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