Proceedings. 1999 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (Cat. No PR00149)
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Abstract

Next Generation Sequencing (NGS) technology im-poses high demands on the performance of read mapping software, leading to increased interest in leveraging hardware accelerators such as field programmable gate arrays (FPGAs). Only few works accelerating the state of the art read mapper BWA-MEM focus on the memory latency bound supermaximal exact match (SMEM) subroutine. With the advent of FPGA devices with on-package high bandwidth memory (HBM) resources, the applicability of such accelerators to the SMEM problem deserves reconsideration. This work introduces BWA-HBM, which accelerates the SMEM algorithm of BWA-MEM by offloading it towards an HBM-supported accelerator card. On a human reference genome the pure SMEM algorithm of BWA-HBM achieves a speedup of 36%, resulting in an overall runtime improvement of 15% compared to BWA-MEM.
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