Abstract
This paper introduces a hardware model of a novel parameterized architecture, which is easy to integrate into almost any design. The architecture enables matrix-formed swarm of heterogeneous smart objects to form an intelligent computing cloud, which can adapt its computing parallelism to available objects automatically in logic pre-synthesis. Data path, consisting of numerous block processing elements, is in generic form distributed or hardwired into objects. Parallelization is achieved by using multiple data processing elements in several locations simultaneously, to get the best computation performance. This computing architecture is fully standard CMOS-process compatible and can also utilize FPGA technology, if data path alteration is needed. In this paper, the first simulation results are demonstrated, proofing the concept.