2020 IEEE International Conference on Big Data and Smart Computing (BigComp)
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Abstract

A new CMOS gate structure tolerating all single transistor stuck-on faults and a large set of multiple faults is presented. Such technique is aimed at guaranteeing fault tolerance for a multiple output gate and the fault tolerance property is achieved through an AUED separated encoding of the output functions and the introduction of additional transistors which avoid fault propagation. As an example, Berger code will be discussed.
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