Cross-layer fault-tolerant design of real-time systems

Siva Satyendra Sahoo; Bharadwaj Veeravalli; Akash Kumar

doi:10.1109/DFT.2016.7684071

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2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)

Cross-layer fault-tolerant design of real-time systems

Year: 2016, Pages: 63-68

DOI Bookmark: 10.1109/DFT.2016.7684071

Authors

Siva Satyendra Sahoo, National University of Singapore, Department of Electrical and Computer Engineering, Singapore
Bharadwaj Veeravalli, National University of Singapore, Department of Electrical and Computer Engineering, Singapore
Akash Kumar, Technische Universität Dresdenm, Center for Advancing Electronics Dresden (cfaed), Germany

Cross-layer fault-tolerant design of real-time systems

Authors

Abstract