High Performance Computing and Grid in Asia Pacific Region, International Conference on
Queue Processor Architecture for Novel Queue Computing Paradigm Based on Produced Order Scheme
DOI Bookmark: 10.1109/HPCASIA.2004.1324032
Authors
Ben A. Abderazek, The University of electro-Communications, JapanM. Arsenji, The University of electro-Communications, Japan
Soichi Shigeta, The University of electro-Communications, Japan
Tsutomu Yoshinaga, The University of electro-Communications, Japan
Masahiro Sowa, The University of electro-Communications, Japan