GRVI Phalanx: A Massively Parallel RISC-V FPGA Accelerator Accelerator

Jan Gray

doi:10.1109/FCCM.2016.12

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)

GRVI Phalanx: A Massively Parallel RISC-V FPGA Accelerator Accelerator

Year: 2016, Pages: 17-20

DOI Bookmark: 10.1109/FCCM.2016.12

Authors

Jan Gray

Abstract

GRVI is an FPGA-efficient RISC-V RV32I soft processor. Phalanx is a parallel processor and accelerator array framework. Groups of processors and accelerators form shared memory clusters. Clusters are interconnected with each other and with extreme bandwidth I/O and memory devices by a Hoplite NOC with 300-bit links. An example Kintex UltraScale 040 system has 400 RISC-V cores, peak throughput of 100,000 MIPS, peak shared memory bandwidth of 600 GB/s, NOC bisection bandwidth of 700 Gb/s, and uses 12-17 W.

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GRVI Phalanx: A Massively Parallel RISC-V FPGA Accelerator Accelerator

Authors

Abstract

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