Validation and optimization of TMR protections for circuits in radiation environments

O. Ruano; J.A. Maestro; P. Reviriego

doi:10.1109/DDECS.2011.5783120

Previous
Next
Table of Contents
Related Articles

14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems

Validation and optimization of TMR protections for circuits in radiation environments

Year: 2011, Pages: 399-400

DOI Bookmark: 10.1109/DDECS.2011.5783120

Authors

O. Ruano, Universidad Antonio Nebrija, Madrid, Spain
J.A. Maestro, Universidad Antonio Nebrija, Madrid, Spain
P. Reviriego, Universidad Antonio Nebrija, Madrid, Spain

Validation and optimization of TMR protections for circuits in radiation environments

Authors

Abstract