Tailbench: a benchmark suite and evaluation methodology for latency-critical applications

Harshad Kasture; Daniel Sanchez

doi:10.1109/IISWC.2016.7581261

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2016 IEEE International Symposium on Workload Characterization (IISWC)

Tailbench: a benchmark suite and evaluation methodology for latency-critical applications

Year: 2016, Pages: 1-10

DOI Bookmark: 10.1109/IISWC.2016.7581261

Authors

Harshad Kasture, Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology
Daniel Sanchez, Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology

Tailbench: a benchmark suite and evaluation methodology for latency-critical applications

Authors

Abstract