Half-DRAM: A high-bandwidth and low-power DRAM architecture from the rethinking of fine-grained activation

Tao Zhang; Ke Chen; Cong Xu; Guangyu Sun; Tao Wang; Yuan Xie

doi:10.1109/ISCA.2014.6853217

Previous
Next
Table of Contents
Similar Articles

2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA)

Half-DRAM: A high-bandwidth and low-power DRAM architecture from the rethinking of fine-grained activation

Year: 2014, Pages: 349-360

DOI Bookmark: 10.1109/ISCA.2014.6853217

Authors

Tao Zhang, Pennsylvania State University, USA
Ke Chen, Oracle Corporation, USA
Cong Xu, Pennsylvania State University, USA
Guangyu Sun, Peking University, China
Tao Wang, Peking University, China
Yuan Xie, Pennsylvania State University, USA

Half-DRAM: A high-bandwidth and low-power DRAM architecture from the rethinking of fine-grained activation

Authors

Abstract