Efficient Hardware Verification Using Machine Learning Approach

Priyanshi Gaur; Sidhartha Sankar Rout; Sujay Deb

doi:10.1109/iSES47678.2019.00045

Previous
Next
Table of Contents
Similar Articles

2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)

Efficient Hardware Verification Using Machine Learning Approach

Year: 2019, Pages: 168-171

DOI Bookmark: 10.1109/iSES47678.2019.00045

Authors

Priyanshi Gaur, Indraprastha Institute of Information Technology Delhi, India
Sidhartha Sankar Rout, Indraprastha Institute of Information Technology Delhi, India
Sujay Deb, Indraprastha Institute of Information Technology Delhi, India

Efficient Hardware Verification Using Machine Learning Approach

Authors

Abstract