2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL)
Download PDF

Abstract

An analog-to-digital converter (ADC) using a deltasigma modulator network is proposed, and signal-level simulations are carried out as a proof of concept. The present architecture is based on a feedforward artificial neural network, where an N-bit digital output is generated through N channels containing one comparator per channel. A moving average of delta-sigma modulator outputs is taken to obtain a multi-level feedforward signal. Simulation results show proper operations of present ADCs consisting of either first-order or second-order delta-sigma modulators. The effective number of bits (ENOB) increases as the number of channels increases. Comparison with conventional architectures is also discussed.
Like what you’re reading?
Already a member?
Get this article FREE with a new membership!

Related Articles