Parameterized FIR Filtering IP Cores for Reusable SoC Design

Umar Farooq; Muhammad Saleem; Habibullah Jamal

doi:10.1109/ITNG.2006.108

Proceedings. Third International Conference on Information Technology: New Generation

Parameterized FIR Filtering IP Cores for Reusable SoC Design

Year: 2006, Pages: 554-559

DOI Bookmark: 10.1109/ITNG.2006.108

Authors

Umar Farooq, University of Engineering & Technology, Pakistan
Muhammad Saleem, University of Engineering & Technology, Pakistan
Habibullah Jamal, University of Engineering & Technology, Pakistan

Abstract

In this paper, Intellectual Property (IP) cores for unfolded direct form (UDF) and folded direct form (FDF) FIR Filters are presented. The proposed IP Cores are parameterized and programmable in terms of data bits, coefficient bits, filter order and the type of filter (Low pass, High Pass, Band Pass etc). The IP Cores are implemented for 8 bit and 16 bit data and coefficient widths on XC3s1000ft256-4 device. The parameterized IP cores can be used for reusable System-on-Chip (SoC) design. Core architectures of UDF and FDF FIR Filter are described in detail and favorable results for area/speed performance are reported.

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Parameterized FIR Filtering IP Cores for Reusable SoC Design

Authors

Abstract

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