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Proceedings
RTSS
RTSS 1996
17th IEEE Real-Time Systems Symposium
Reducing the number of clock variables of timed automata
Year: 1996, Pages: 73
DOI Bookmark:
10.1109/REAL.1996.563702
Authors
C. Daws
,
VERIMAG, Montbonnot St. Martin, Franc
S. Yovine
,
VERIMAG, Montbonnot St. Martin, Franc
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