A new SAT-based ATPG for generating highly compacted test sets

2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)

Year: 2012, Pages: 230-235

Stephan Eggersglüß, University of Bremen, 28359, Germany
René Krenz-Bååth, Hochschule Hamm-Lippstadt, 59063, Germany
Andreas Glowatz, Mentor Graphics, 21079 Hamburg, Germany
Friedrich Hapke, Mentor Graphics, 21079 Hamburg, Germany
Rolf Drechsler, University of Bremen, 28359, Germany