2015 19th International Symposium on VLSI Design and Test (VDAT)
High-performance multiplierless DCT architecture for HEVC
DOI Bookmark: 10.1109/ISVDAT.2015.7208051
Authors
A. D. Darji, Department of Electronics Engineering, S. V. National Institute of Technology, Surat, Gujarat - 395 007Raviraj P. Makwana, Department of Electronics Engineering, S. V. National Institute of Technology, Surat, Gujarat - 395 007