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2020 IEEE 27th Symposium on Computer Arithmetic (ARITH)

June 7 2020 to June 10 2020

Portland, OR, USA

ISBN: 978-1-7281-7120-3

Table of Contents

[Title page]Freely available from IEEE.pp. i-i
[Title page]Freely available from IEEE.pp. i-i
[ARITH 2020 Copyright notice]Freely available from IEEE.pp. i-i
Table of ContentsFreely available from IEEE.pp. i-iii
Foreword ARITH 2020Freely available from IEEE.pp. i-i
ARITH 2020 CommitteesFreely available from IEEE.pp. i-i
ARITH 2020 CommitteesFreely available from IEEE.pp. i-i
ARITH 2020 List Reviewer PageFreely available from IEEE.pp. i-i
Sponsors ARITH 2020Freely available from IEEE.pp. i-i
Floating–Point Fused Multiply–Add under HUB FormatFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
A Correctly-Rounded Fixed-Point-Arithmetic Dot-Product AlgorithmFull-text access may be available. Sign in or learn about subscription options.pp. 9-16
Heuristics for the Design of Large Multipliers for FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 17-24
Efficient, arbitrarily high precision hardware logarithmic arithmetic for linear algebraFull-text access may be available. Sign in or learn about subscription options.pp. 25-32
A Novel Method of Modular Multiplication Based on Karatsuba-like MultiplicationFull-text access may be available. Sign in or learn about subscription options.pp. 33-40
Alternative Split Functions and Dekker’s ProductFull-text access may be available. Sign in or learn about subscription options.pp. 41-47
Algorithms for Manipulating Quaternions in Floating-Point ArithmeticFull-text access may be available. Sign in or learn about subscription options.pp. 48-55
A Hole in the Ladder : Interleaved Variables in Iterative Conditional BranchingFull-text access may be available. Sign in or learn about subscription options.pp. 56-63
Highly Optimized Montgomery Multiplier for SIKE Primes on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 64-71
An asymptotically faster version of FV supported on HPRFull-text access may be available. Sign in or learn about subscription options.pp. 80-87
Maximum Delay Models for Parallel-Prefix Adders in the Presence of Threshold Voltage VariationsFull-text access may be available. Sign in or learn about subscription options.pp. 88-95
Variable Precision 16-Bit Floating-Point Vector Unit for Embedded ProcessorsFull-text access may be available. Sign in or learn about subscription options.pp. 96-102
A Framework for Semi-Automatic Precision and Accuracy Analysis for Fast and Rigorous Deep LearningFull-text access may be available. Sign in or learn about subscription options.pp. 103-110
Variable-Radix Coding of the RealsFull-text access may be available. Sign in or learn about subscription options.pp. 111-116
Automatic Design Space Exploration for an Error Tolerant ApplicationFull-text access may be available. Sign in or learn about subscription options.pp. 117-120
Custom-Precision Mathematical Library Explorations for Code Profiling and OptimizationFull-text access may be available. Sign in or learn about subscription options.pp. 121-124
SIMD Multi Format Floating-Point Unit on the IBM z15(TM)Full-text access may be available. Sign in or learn about subscription options.pp. 125-128
Issues with rounding in the GCC implementation of the ISO 18037:2008 standard fixed-point arithmeticFull-text access may be available. Sign in or learn about subscription options.pp. 129-132
ARITH 2020 IndexFreely available from IEEE.pp. i-i
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