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2024 IEEE 31st Symposium on Computer Arithmetic (ARITH)

June 10 2024 to June 12 2024

Malaga, Spain

ISBN: 979-8-3503-8432-1

Table of Contents

Title Page iFreely available from IEEE.pp. 1-1
Title Page iiiFreely available from IEEE.pp. 3-3
Copyright PageFreely available from IEEE.pp. 4-4
Table of ContentsFreely available from IEEE.pp. 5-7
Message from Conference ChairsFreely available from IEEE.pp. 8-9
Organizing CommitteeFreely available from IEEE.pp. 10-10
Program CommitteeFreely available from IEEE.pp. 11-11
Steering CommitteeFreely available from IEEE.pp. 12-13
ReviewersFreely available from IEEE.pp. 14-15
SponsorsFreely available from IEEE.pp. 16-17
Hardware Acceleration of the Prime-Factor and Rader NTT for BGV Fully Homomorphic EncryptionFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
by David Du Pont, Jonas Bertels, Furkan Turan, Michiel Van Beirendonck, Ingrid Verbauwhede
PQC-AMX: Accelerating Saber and FrodoKEM on the Apple M1 and M3 SoCsFull-text access may be available. Sign in or learn about subscription options.pp. 9-16
by Décio Luiz Gazzoni Filho, Guilherme Brandão, Gora Adj, Arwa Alblooshi, Isaac A. Canales-Martínez, Jorge Chávez-Saab, Julio López
Montgomery Modular Multiplication via Single-Base Residue Number SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 17-23
by Zabihollah Ahmadpour, Ghassem Jaberipur, Jeong-A Lee
Combining Power and Arithmetic Optimization via Datapath RewritingFull-text access may be available. Sign in or learn about subscription options.pp. 24-31
by Samuel Coward, Theo Drane, Emiliano Morini, George A. Constantinides
Useful applications of correctly-rounded operators of the form ab + cd + eFull-text access may be available. Sign in or learn about subscription options.pp. 32-39
by Tom Hubrecht, Claude-Pierre Jeannerod, Jean-Michel Muller
Fused FP8 4-Way Dot Product With Scaling and FP32 AccumulationFull-text access may be available. Sign in or learn about subscription options.pp. 40-47
by David R. Lutz, Anisha Saini, Mairin Kroes, Thomas Elmer, Harsha Valsaraju
Multiple-base Logarithmic Quantization and Application in Reduced Precision AI ComputationsFull-text access may be available. Sign in or learn about subscription options.pp. 48-51
by Vassil Dimitrov, Richard Ford, Laurent Imbert, Arjuna Madanayake, Nilan Udayanga, Will Wray
Novel Access Patterns Based on Overlapping Loading and Processing Times to Reduce Latency and Increase Throughput in Memory-based FFTsFull-text access may be available. Sign in or learn about subscription options.pp. 52-59
by Zeynep Kaya, Mario Garrido
An Open-Source RISC-V Vector Math LibraryFull-text access may be available. Sign in or learn about subscription options.pp. 60-67
by Ping Tak, Peter Tang
MATLAB Simulator of Level-Index ArithmeticFull-text access may be available. Sign in or learn about subscription options.pp. 68-71
by Mantas Mikaitis
APyTypes: Algorithmic Data Types in Python for Efficient Simulation of Finite Word-Length EffectsFull-text access may be available. Sign in or learn about subscription options.pp. 72-75
by Mikael Henriksson, Theodor Lindberg, Oscar Gustafsson
An Emacs-Cairo Scrolling Bug due to Floating-Point InaccuracyFull-text access may be available. Sign in or learn about subscription options.pp. 76-79
by Vincent Lefèvre
Fast multiple precision exp(x) with precomputationsFull-text access may be available. Sign in or learn about subscription options.pp. 80-87
by Joris van der Hoeven, Fredrik Johansson
HGH-CORDIC: A High-Radix Generalized Hyperbolic COordinate Rotation Digital ComputerFull-text access may be available. Sign in or learn about subscription options.pp. 88-95
by Hui Chen, Lianghua Quan, Weiqiang Liu
Rounding Error Analysis of an Orbital Collision Probability Evaluation AlgorithmFull-text access may be available. Sign in or learn about subscription options.pp. 96-103
by Denis Arzelier, Florent Bréhard, Mioara Joldes, Marc Mezzarobba
Multiplier Architecture with a Carry-Based Partial Product EncodingFull-text access may be available. Sign in or learn about subscription options.pp. 104-107
by Martin Langhammer, Bogdan Pasca, Igor Kucherenko
On the Systematic Creation of Faithfully Rounded Commutative Truncated Booth MultipliersFull-text access may be available. Sign in or learn about subscription options.pp. 108-115
by Theo Drane, Samuel Coward, Mertcan Temel, Joe Leslie-Hurd
A Time Efficient Comprehensive Model of Approximate Multipliers for Design Space ExplorationFull-text access may be available. Sign in or learn about subscription options.pp. 116-123
by Ziying Cui, Ke Chen, Bi Wu, Chenggang Yan, Yu Gong, Weiqiang Liu
Small Logic-based Multipliers with Incomplete Sub-Multipliers for FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 124-131
by Andreas Böttcher, Martin Kumm
Square Root Unit with Minimum Iterations for Posit ArithmeticFull-text access may be available. Sign in or learn about subscription options.pp. 132-138
by Raul Murillo, Alberto A. Del Barrio, Guillermo Botella
PT-Float: A Floating-Point Unit with Dynamically Varying Exponent and Fraction SizesFull-text access may be available. Sign in or learn about subscription options.pp. 139-146
by José T. de Sousa, João D. Lopes, Micaela Serôdio, Horácio C. Neto, Mário P. Véstias
Author IndexFreely available from IEEE.pp. 147-147
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