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2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP)

July 6 2016 to July 8 2016

London, United Kingdom

Table of Contents

Copyright pageFreely available from IEEE.pp. ii-ii
Message from the ASAP 2016 chairsFreely available from IEEE.pp. iii-iv
by David Thomas, Suhaib Fahmy
Conference committeeFreely available from IEEE.pp. v-vii
Compressed L1 data cache and L2 cache in GPGPUsFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
by Ehsan Atoofian
Adaptive ILP control to increase fault tolerance for VLIW processorsFull-text access may be available. Sign in or learn about subscription options.pp. 9-16
by Anderson L. Sartor, Stephan Wong, Antonio C. S. Beck
Supervised and unsupervised machine learning for side-channel based Trojan detectionFull-text access may be available. Sign in or learn about subscription options.pp. 17-24
by Dirmanto Jap, Wei He, Shivam Bhasin
A grain in the silicon: SCA-protected AES in less than 30 slicesFull-text access may be available. Sign in or learn about subscription options.pp. 25-32
by Pascal Sasdrich, Tim Güneysu
OpenCL-based erasure coding on heterogeneous architecturesFull-text access may be available. Sign in or learn about subscription options.pp. 33-40
by Guoyang Chen, Huiyang Zhou, Xipeng Shen, Josh Gahm, Narayan Venkat, Skip Booth, John Marshall
Unleashing the performance potential of CPU-GPU platforms for the 3D atmospheric Euler solverFull-text access may be available. Sign in or learn about subscription options.pp. 41-49
by Haohuan Fu, Jingheng Xu, Lin Gan, Chao Yang, Wei Xue, Wenlai Zhao, Wen Shi, Xinliang Wang, Guangwen Yang
HW/SW-database-codesign for compressed bitmap index processingFull-text access may be available. Sign in or learn about subscription options.pp. 50-57
by Sebastian Haas, Tomas Karnagel, Oliver Arnold, Erik Laux, Benjamin Schlegel, Gerhard Fettweis, Wolfgang Lehner
Modulo scheduling of symbolically tiled loops for tightly coupled processor arraysFull-text access may be available. Sign in or learn about subscription options.pp. 58-66
by Michael Witterauf, Alexandru Tanase, Frank Hannig, Jürgen Teich
Efficient pointer management of stack data for software managed multicoresFull-text access may be available. Sign in or learn about subscription options.pp. 67-74
by Jian Cai, Aviral Shrivastava
A unified software approach to specify pipeline and spatial parallelism in FPGA hardwareFull-text access may be available. Sign in or learn about subscription options.pp. 75-82
by Jongsok Choi, Ruo Long Lian, Stephen Brown, Jason Anderson
A multi-beam Scan Mode Synthetic Aperture Radar processor suitable for satellite operationFull-text access may be available. Sign in or learn about subscription options.pp. 83-90
by Mohammad Reza Mohammadnia, Lesley Shannon
Synthesisable recursion for C++ HLS toolsFull-text access may be available. Sign in or learn about subscription options.pp. 91-98
by David B. Thomas
A Domain Specific Language for accelerated Multilevel Monte Carlo simulationsFull-text access may be available. Sign in or learn about subscription options.pp. 99-106
by Ben Lindsey, Matthew Leslie, Wayne Luk
F-CNN: An FPGA-based framework for training Convolutional Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 107-114
by Wenlai Zhao, Haohuan Fu, Wayne Luk, Teng Yu, Shaojun Wang, Bo Feng, Yuchun Ma, Guangwen Yang
Energy efficient deeply fused dot-product multiplication architectureFull-text access may be available. Sign in or learn about subscription options.pp. 115-122
by Shmuel Wimer, Israel Koren
Guarding the guards: Enhancing LNS performance for common applicationsFull-text access may be available. Sign in or learn about subscription options.pp. 123-130
by Mark Arnold, Ed Chester, John Cowles
New non-uniform segmentation technique for software function evaluationFull-text access may be available. Sign in or learn about subscription options.pp. 131-138
by Justine Bonnot, Erwan Nogues, Daniel Menard
Parallel floating-point expansions for extended-precision GPU computationsFull-text access may be available. Sign in or learn about subscription options.pp. 139-146
by Caroline Collange, Mioara Joldes, Jean-Michel Muller, Valentina Popescu
Temporal frequent value localityFull-text access may be available. Sign in or learn about subscription options.pp. 147-152
by Lois Orosa, Rodolfo Azevedo
A MPSoC cache design space exploration approach based on ABC algorithm to optimize energy consumption and performanceFull-text access may be available. Sign in or learn about subscription options.pp. 153-158
by Marcus V. D. dos Santos, Edna Barros, Andre Aziz
gemV: A validated toolset for the early exploration of system reliabilityFull-text access may be available. Sign in or learn about subscription options.pp. 159-163
by Karthik Tanikella, Yohan Koy, Reiley Jeyapaul, Kyoungwoo Lee, Aviral Shrivastava
On-chip networks for mixed-criticality systemsFull-text access may be available. Sign in or learn about subscription options.pp. 164-169
by Polydoros Petrakis, Mohammed Abuteir, Miltos D. Grammatikakis, Kyprianos Papadimitriou, Roman Obermaisser, Zaher Owda, Antonis Papagrigoriou, Michael Soulie, Marcello Coppola
Combining GPU and FPGA technology for efficient exhaustive interaction analysis in GWASFull-text access may be available. Sign in or learn about subscription options.pp. 170-175
by Jan Christian Kässens, Lars Wienbrandt, Manfred Schimmler, Jorge González-Domínguez, Bertil Schmidt
Accelerating K-means clustering on a tightly-coupled processor-FPGA heterogeneous systemFull-text access may be available. Sign in or learn about subscription options.pp. 176-181
by Tarek S. Abdelrahman
Design space exploration and constrained multiobjective optimization for digital predistortion systemsFull-text access may be available. Sign in or learn about subscription options.pp. 182-185
by Lin Li, Amanullah Ghazi, Jani Boutellier, Lauri Anttila, Mikko Valkama, Shuvra S. Bhattacharyya
A hardware accelerator for the alignment of multiple DNA sequences in forensic identificationFull-text access may be available. Sign in or learn about subscription options.pp. 186-190
by Antonyus P. A. Ferreira, Joao G. M. Silva, Jefferson R. L. Anjos, Luiz H. A. Figueiroa, Edna N. S. Barros, Manoel E. Lima, Victor W. C. Medeiros
Real time all intra HEVC HD encoder on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 191-195
by Sachille Atapattu, Namitha Liyanage, Nisal Menuka, Ishantha Perera, Ajith Pasqual
Parametrized system level design: Real-time X-Ray image processing case studyFull-text access may be available. Sign in or learn about subscription options.pp. 196-201
by Tsvetan Shoshkov, Todor Stefanov, Bart Kienhuis
Pipelined FPGA implementation of numerical integration of the Hodgkin-Huxley modelFull-text access may be available. Sign in or learn about subscription options.pp. 202-206
by Roberto R. Osorio
FPGA-based frequency estimation of a DFB laser using Rb spectroscopy for space missionsFull-text access may be available. Sign in or learn about subscription options.pp. 207-212
by Christian Spindeldreier, Thijs Wendrich, Ernst Maria Rasel, Wolfgang Ertmer, Holger Blume
Bridging the FPGA programmability-portability Gap via automatic OpenCL code generation and tuningFull-text access may be available. Sign in or learn about subscription options.pp. 213-218
by Konstantinos Krommydas, Ruchira Sasanka, Wu-chun Feng
Configuration technique for adaptability of multicore processors on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 219-220
by Tetsuo Miyauchi, Kiyofumi Tanaka
Performance optimization of Jacobi stencil algorithms based on POWER8 architectureFull-text access may be available. Sign in or learn about subscription options.pp. 221-222
by Jingheng Xu, Haohuan Fu, Lin Gan, Yu Song, Hongbo Peng, Wen Shi, Guangwen Yang
Display power reduction for mobile closed-source gamesFull-text access may be available. Sign in or learn about subscription options.pp. 223-224
by Zhinan Cheng, Xi Li, Jiachen Song, Beilei Sun, Xuehai Zhou, Chao Wang
An efficient embedded processor for object detection using ASIP methodologyFull-text access may be available. Sign in or learn about subscription options.pp. 225-226
by Shanlin Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda
An ESL framework for low power architecture design space explorationFull-text access may be available. Sign in or learn about subscription options.pp. 227-228
by Hend Affes, Amal Ben Ameur, Michel Auguin, François Verdier, Calypso Barnes
soft-NEON: A study on replacing the NEON engine of an ARM SoC with a reconfigurable fabricFull-text access may be available. Sign in or learn about subscription options.pp. 229-230
by Jose Raul Garcia Ordaz, Dirk Koch
Architecture for fractal dimension estimation based on Minkowski-Bouligand method using integer distancesFull-text access may be available. Sign in or learn about subscription options.pp. 231-232
by Isabela Rossales, Maximiliam Luppe
SHA-3 Instruction Set Extension for A 32-bit RISC processor architectureFull-text access may be available. Sign in or learn about subscription options.pp. 233-234
by Ahmed S. Eissa, Mahmoud A. Elmohr, Mostafa A. Saleh, Khaled E. Ahmed, Mohammed M. Farag
Temporized data prefetching algorithm for NoC-based multiprocessor systemsFull-text access may be available. Sign in or learn about subscription options.pp. 235-236
by Maria Cireno, André Aziz, Edna Barros
HW/SW co-design based implementation of Gas discriminationFull-text access may be available. Sign in or learn about subscription options.pp. 237-238
by Amine Ait Si Ali, Abbes Amira, Faycal Bensaali, Mohieddine Benammar, Amine Bermak
Architecture for quadruple precision floating point division with multi-precision supportFull-text access may be available. Sign in or learn about subscription options.pp. 239-240
by Manish Kumar Jaiswal, Hayden K.-H So
Oolong: A Baseband processor extension to the RISC-V ISAFull-text access may be available. Sign in or learn about subscription options.pp. 241-242
by Cecil Accetti R. A. Melo, Edna Barros
Relation-oriented resource allocation for multi-accelerator systemsFull-text access may be available. Sign in or learn about subscription options.pp. 243-244
by Teng Yu, Bo Feng, Mark Stillwell, Jose Gabriel F Coutinho, Wenlai Zhao, Shuang Liang, Wayne Luk, Alexander L. Wolf, Yuchun Ma
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