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Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems

Mar. 30 1998 to Apr. 2 1998

San Diego, CA

ISBN: 0-8186-8392-9

Table of Contents

Message from the Program ChairsFreely available from IEEE.pp. viii
Symposium CommitteeFreely available from IEEE.pp. ix
Session I: SUN, Chair: Al Davis, University of Utah
A FIFO Data Switch Design ExperimentFull-text access may be available. Sign in or learn about subscription options.pp. 0004
Session II: Microprocessor I, Chair: Erik Brunvand, University of Utah
ASPRO-216: A Standard-Cell Q.D.I. 16-Bit RISC Asynchronous MicroprocessorFull-text access may be available. Sign in or learn about subscription options.pp. 0022
Session II: Microprocessor I, Chair: Erik Brunvand, University of Utah
A Low-Power, Low-Noise, Configurable Self-Timed DSPFull-text access may be available. Sign in or learn about subscription options.pp. 0032
Session II: Microprocessor I, Chair: Erik Brunvand, University of Utah
A Fast Asynchronous Huffman Decoder for Compressed-Code Embedded ProcessorsFull-text access may be available. Sign in or learn about subscription options.pp. 0043
Session III: Synthesis and Tech Map, Chair: Steve Burns, INTEL Corporation
An Implicit Method for Hazard-Free Two-Level Logic MinimizationFull-text access may be available. Sign in or learn about subscription options.pp. 0058
Session III: Synthesis and Tech Map, Chair: Steve Burns, INTEL Corporation
Average-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 0070
Session III: Synthesis and Tech Map, Chair: Steve Burns, INTEL Corporation
Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 0080
Session IV: Microprocessor II, Chair: Steve Furber, University of Manchester, UK
An Asynchronous Low-Power 80C51 MicrocontrollerFull-text access may be available. Sign in or learn about subscription options.pp. 0096
Session IV: Microprocessor II, Chair: Steve Furber, University of Manchester, UK
The Design of an Asynchronous TinyRISCTM TR4101 Microprocessor CoreFull-text access may be available. Sign in or learn about subscription options.pp. 0108
Session V: Interconnect, Chair: Mark Horowitz, Stanford University
Asynchronous Macrocell Interconnect using MARBLEFull-text access may be available. Sign in or learn about subscription options.pp. 0122
Session V: Interconnect, Chair: Mark Horowitz, Stanford University
An Asynchronous PRBS Error Checker for Testing High-Speed Self-Clocked Serial LinksFull-text access may be available. Sign in or learn about subscription options.pp. 0133
Session VI: Verification, Chair: Ganesh Gopalakrishnan, University of Utah
Verifying a Self-Timed DividerFull-text access may be available. Sign in or learn about subscription options.pp. 0146
Session VI: Verification, Chair: Ganesh Gopalakrishnan, University of Utah
Verification of Speed-Dependences in Single-Rail Handshake CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 0159
Session VII: Formal Methods, Chair: Mark Josephs, Southbank University, UK
Analyzing Specifications for Delay-Insensitive CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 0172
Session VII: Formal Methods, Chair: Mark Josephs, Southbank University, UK
Building Finite Automata from DI SpecificationsFull-text access may be available. Sign in or learn about subscription options.pp. 0184
Session VII: Formal Methods, Chair: Mark Josephs, Southbank University, UK
Membership Test Logic for Delay-Insensitive CodesFull-text access may be available. Sign in or learn about subscription options.pp. 0194
Session VIII: Signal Processing, Chair: Jens Sparsø, Technical University of Denmark
Towards Asynchronous A-D ConversionFull-text access may be available. Sign in or learn about subscription options.pp. 0206
Session VIII: Signal Processing, Chair: Jens Sparsø, Technical University of Denmark
A Single Chip Low Power Asynchronous Implementation of an FFT Algorithm for Space ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 0216
Session VIII: Signal Processing, Chair: Jens Sparsø, Technical University of Denmark
An Asynchronous 2-D Discrete Cosine Transform ChipFull-text access may be available. Sign in or learn about subscription options.pp. 0224
Session IX: Performance Analysis, Chair: Mark Greenstreet, University of British Columbia
Predicting Performance of Micropipelines Using Charlie DiagramsFull-text access may be available. Sign in or learn about subscription options.pp. 0238
Session IX: Performance Analysis, Chair: Mark Greenstreet, University of British Columbia
Accelerating Markovian Analysis of Asynchronous Systems using String- based State CompressionFull-text access may be available. Sign in or learn about subscription options.pp. 0247
Session X: RSFQ, Chair: Don Fussell, University of Texas at Austin
Primitive-Level Pipelining Method on Delay-Insensitive Model for RSFQ Pulse-Driven LogicFull-text access may be available. Sign in or learn about subscription options.pp. 0262
Session X: RSFQ, Chair: Don Fussell, University of Texas at Austin
Asynchronous Circuits and Systems in Superconducting RSFQ Digital TechnologyFull-text access may be available. Sign in or learn about subscription options.pp. 0274
Index
Author IndexFreely available from IEEE.pp. 0289
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