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2012 13th Latin American Test Workshop (LATW)

April 10 2012 to April 13 2012

Quito, Ecuador

Table of Contents

Papers
Technical programFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
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Author indexFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
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CommitteesFull-text access may be available. Sign in or learn about subscription options.pp. 1-3
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[Copyright notice]Full-text access may be available. Sign in or learn about subscription options.pp. 1
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Built-in self-diagnosis targeting arbitrary defects with partial pseudo-exhaustive testFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
by Alejandro Cook, Sybille Hellebrand, Michael E. Imhof, Abdullah Mumtaz, Hans-Joachim Wunderlich
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Simulation of SET faults in a voltage controlled oscillatorFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Walter E. Calienes Bartra, Fernanda L. Kastensmidt, Ricardo Reis
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Low voltage testing for interconnect opens under process variationsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Jesus Moreno, Victor Champac, Michel Renovell
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Low-power design under variation using error prevention and error tolerance (invited paper)Full-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Kwanyeob Chae, Minki Cho, Saibal Mukhopadhyay
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Variation-aware and self-healing design methodology for a system-on-chipFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
by Jangjoon Lee, Srikar Bhagavatula, Kaushik Roy, Byunghoo Jung
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Diagnosis and correction of multiple design errors using critical path tracing and mutation analysisFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Hanno Hantson, Urmas Repinski, Jaan Raik, Maksim Jenihhin, Raimund Ubar
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A guiding heuristic for the semi-formal verification of high-level designsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
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Self-optimization of dense wireless sensor networks based on simulated annealingFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by A.R. Pinto, Adriano Cansian, José Marcio Machado, Carlos Montez
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Design-for-manufacturability of MEMS convective accelerometers through adaptive electrical calibration strategyFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by A.A. Rekik, F. Azais, F. Mailly, P. Nouet
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Investigating the use of an on-chip sensor to monitor NBTI effect in SRAMFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by A. Ceratti, T. Copetti, L. Bolzani, F. Vargas
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Parametric DC and noise measurements in a unified test & characterization software tool frameworkFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Jose A. Rodriguez, Manuel Jimenez, William Morales, Fan-Chi Hou, Lucianne Millan, Rogelio Palomera
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Mutation operators for concurrent programs in MPIFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
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Automatic generation of an FPGA based embedded test system for printed circuit board testingFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by J.-H. Meza Escobar, J. SachBe, S. Ostendorff, H.-D. Wuttke
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Platform for automated HW/SW co-verification, testing and simulation of microprocessorsFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by Aleksandar Simevski, Rolf Kraemer, Milos Krstic
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About robustness of test patterns regarding multiple faultsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Raimund Ubar, Sergei Kostin, Jaan Raik
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Model-based design for wireless body sensor network nodesFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Ivan Beretta, Francisco Rincon, Nadia Khaled, Paolo Roberto Grassi, Vincenzo Rana, David Atienza, Donatella Sciuto
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Fast and scalable temperature-driven floorplan design in 3D MPSoCsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Ignacio Arnaldo, Alessandro Vicenzi, Jose L. Ayala, Jose L. Risco, J. Ignacio Hidalgo, Martino Ruggiero, David Atienza
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Fast worst-case peak temperature evaluation for real-time applications on multi-core systemsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Lars Schor, Iuliana Bacivarov, Hoeseok Yang, Lothar Thiele
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Built-in tuning of RFIC Passive Polyphase Filter by process and thermal monitoringFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by F. Haddad, W. Rahajandraibe, H. Aziza, K. Castellani-Coulie, J-M. Portal
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Multi-condition alternate test of analog, mixed-signal, and RF systemsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
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Acquiring real-time heating of cells in standard cell designsFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by Andras Timar, Marta Rencz
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Simulation framework for multilevel power estimation and timing analysis of digital systems allowing the consideration of thermal effectsFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by Gergely Nagy, Andras Poppe
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PSL assertion checkers synthesis with ASM based HLS tool ABELITEFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Maksim Jenihhin, Samary Baranov, Jaan Raik, Valentin Tihhomirov
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Retiming scan circuit to eliminate timing penaltyFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Ozgur Sinanoglu, Vishwani D. Agrawal
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Investigation of a CMOS oscillator concept for particle detection and diagnosisFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by K. Castellani-Coulie, H. Aziza, W. Rahajandraibe, G. Micolau, J-M. Portal
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SITARe: A simulation tool for analysis and diagnosis of radiation effectsFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by G. Micolau, K. Castellani-Coulie, H. Aziza, J-M. Portal
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Impact of TID-induced threshold deviations in analog building-blocks of operational amplifiersFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Guilherme S. Cardoso, Tiago R. Balen, Marcelo S. Lubaszewski, Rafael G. Vaz, Odair L. Goncalez
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SET susceptibility estimation of clock tree networks from layout extractionFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Raul Chipana, Fernanda Lima Kastensmidt, Jorge Tonfat, Ricardo Reis
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Applying adaptive temporal filtering for SET mitigation based on the propagation-delay of every logical pathFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Jose Eduardo Pereira Souza, Fernanda Lima Kastensmidt
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SEU fault-injection in VHDL-based processors: A case studyFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by Wassim Mansour, Raoul Velazco
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Configurable tool to protect processors against SEE by software-based detection techniquesFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Eduardo Chielle, Raul Sergio Barth, Angelo Cardoso Lapolli, Fernanda Lima Kastensmidt
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MoDiVHA: A hierarchical strategy for distributed test assignmentFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Jefferson Paulo Koppe, Elias P. Duarte, Luis C. E. Bona
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Detailed analysis of compilation options for robust software-based embedded systemsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by A. Wecxsteen, S. Bergaoui, R. Leveugle
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Selective hardening methodology for combinational logicFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Samuel N. Pagliarini, Lirida A. de B. Naviner, Jean-Francois Naviner
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Pattern-based injections in processors implemented on SRAM-based FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
by M. Ben Jrad, R. Leveugle
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Non-intrusive fault tolerance in soft processors through circuit duplicationFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Frederico Ferlini, Felipe A. da Silva, Eduardo A. Bezerra, Djones V. Lettnin
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Technical reviewersFull-text access may be available. Sign in or learn about subscription options.pp. 1
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