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Proceedings of the Tenth International Symposium on Hardware/Software Codesign. CODES 2002

May 8 2002 to May 8 2002

Estes Park, CO, USA

Table of Contents

Proceedings of the Tenth International Symposium on Hardware/Software Codesign. CODES 2002 (IEEE Cat. No.02TH8627)Full-text access may be available. Sign in or learn about subscription options.
Codesign-extended applicationsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by B. Grattan, G. Stitt, F. Vahid
Algorithmic transformation techniques for efficient exploration of alternative application instancesFull-text access may be available. Sign in or learn about subscription options.pp. 7-12
by T. Stefanov, B. Kienhuis, E. Deprettere
Concurrent execution semantics and sequential simulation algorithms for the Metropolis meta-modelFull-text access may be available. Sign in or learn about subscription options.pp. 13-18
by F. Balarin, L. Lavagno, C. Passerone, A. Sangiovanni-Vincentelli, Y. Watanabe, Guang Yang
The design context of concurrent computation systemsFull-text access may be available. Sign in or learn about subscription options.pp. 19-24
by J.M. Paul, C.M. Eatedali, D.E. Thomas
A language for multiple models of computationFull-text access may be available. Sign in or learn about subscription options.pp. 25-30
by D. Bjorklund, J. Lilius
FPGA resource and timing estimation from Matlab execution tracesFull-text access may be available. Sign in or learn about subscription options.pp. 31-36
by P. Bjureus, M. Millberg, A. Jantsch
Worst-case performance analysis of parallel, communicating software processesFull-text access may be available. Sign in or learn about subscription options.pp. 37-42
by A. Siebenborn, O. Bringmann, W. Rosenstiel
Symbolic model checking of dual transition Petri NetsFull-text access may be available. Sign in or learn about subscription options.pp. 43-48
by M. Varea, B.M. Al-Hashimi, L.A. Cortes, P. Eles, Zebo Peng
Simulation Bridge: a framework for multi-processor simulationFull-text access may be available. Sign in or learn about subscription options.pp. 49-54
by G.D. Nagendra, V.G.P. Kumar, B.S. Sheshadri
Metrics for design space exploration of heterogeneous multiprocessor embedded systemsFull-text access may be available. Sign in or learn about subscription options.pp. 55-60
by D. Sciuto, F. Salice, L. Pomante, W. Fornaciari
Fast processor core selection for WLAN modem using mappability estimationFull-text access may be available. Sign in or learn about subscription options.pp. 61-66
by J.-P. Soininen, J. Kreku, Yang Qu, M. Forsell
Multi-objective design space exploration using genetic algorithmsFull-text access may be available. Sign in or learn about subscription options.pp. 67-72
by M. Palesi, T. Givargis
Scratchpad memory: a design alternative for cache on-chip memory in embedded systemsFull-text access may be available. Sign in or learn about subscription options.pp. 73-78
by R. Banakar, S. Steinke, Bo-Sik Lee, M. Balakrishnan, P. Marwedel
Hardware support for real-time embedded multiprocessor system-on-a-chip memory managementFull-text access may be available. Sign in or learn about subscription options.pp. 79-84
by M. Shalan, V.J. Mooney
Large exploration for HW/SW partitioning of multirate and aperiodic real-time systemsFull-text access may be available. Sign in or learn about subscription options.pp. 85-90
by A. Azzedine, J.-P. Diguet, J.-L. Pillippe
Program slicing for codesignFull-text access may be available. Sign in or learn about subscription options.pp. 91-96
by J.T. Russell
Compiler-directed customization of ASIP coresFull-text access may be available. Sign in or learn about subscription options.pp. 97-102
by T.V.K. Gupta, R.E. Ko, R. Barua
A study of CodePack: optimizing embedded code spaceFull-text access may be available. Sign in or learn about subscription options.pp. 103-108
by A. Orpaz, S. Weiss
A novel codesign approach based on distributed virtual machinesFull-text access may be available. Sign in or learn about subscription options.pp. 109-114
by C. Kreiner, C. Steger, E. Teiniker, R. Weiss
Optimization and synthesis for complex reactive embedded systems by incremental collapsingFull-text access may be available. Sign in or learn about subscription options.pp. 115-120
by M. Chiodo
Transformation of SDL specifications for system-level timing analysisFull-text access may be available. Sign in or learn about subscription options.pp. 121-126
by M. Jersak, K. Richter, R. Henia, R. Ernst, F. Slomka
Strongly polynomial-time algorithm for over-constraint resolution: efficient debugging of timing constraint violationsFull-text access may be available. Sign in or learn about subscription options.pp. 127-132
by A. Dasdan
Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraintsFull-text access may be available. Sign in or learn about subscription options.pp. 133,134,135,136,137,138
by Hyunok Oh, Soonhoi Ha
Design of multi-tasking coprocessor control for EclipseFull-text access may be available. Sign in or learn about subscription options.pp. 139-144
by M.J. Rutten, J.T.J. van Eijndhoven, E.-J.D. Pol
Hardware-software bipartitioning for dynamically reconfigurable systemsFull-text access may be available. Sign in or learn about subscription options.pp. 145-150
by D.N. Rakhmatov, S.B.K. Vrudhula
HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platformFull-text access may be available. Sign in or learn about subscription options.pp. 151-156
by M. Baleani, F. Gennari, Yunjian Jiang, Y. Patel, R.K. Brayton, A. Sangiovanni-Vincentelli
Fast system-level power profiling for battery-efficient system designFull-text access may be available. Sign in or learn about subscription options.pp. 157-162
by K. Lahiri, A. Raghunathan, S. Dey
Energy savings through compression in embedded Java environmentsFull-text access may be available. Sign in or learn about subscription options.pp. 163-168
by G. Chen, M. Kandemir, N. Vijaykrishnan, M.J. Irwin, W. Wolf
Communication speed selection for embedded systems with networked voltage-scalable processorsFull-text access may be available. Sign in or learn about subscription options.pp. 169,170,171,172,173,174
by Jinfeng Liu, P.H. Chou, N. Bagherzadeh
Pruning-based energy-optimal device scheduling for hard real-time systemsFull-text access may be available. Sign in or learn about subscription options.pp. 175-180
by V. Swaminathan, K. Chakrabarty
Energy frugal tags in reprogrammable I-caches for application-specific embedded processorsFull-text access may be available. Sign in or learn about subscription options.pp. 181-186
by P. Petrov, A. Orailoglu
Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systemsFull-text access may be available. Sign in or learn about subscription options.pp. 187-192
by T. Pop, P. Eles, Zebo Peng
Locality-conscious process scheduling in embedded systemsFull-text access may be available. Sign in or learn about subscription options.pp. 193-198
by I. Kadayif, M. Kandemir, I. Kolcu, G. Chen
Reconfigurable SoC design with hierarchical FSM and synchronous dataflow modelFull-text access may be available. Sign in or learn about subscription options.pp. 199,200,201,202,203,204
by Sunghyun Lee, Sungjoo Yoo, Kiyoung Choi
Dynamic run-time HW/SW scheduling techniques for reconfigurable architecturesFull-text access may be available. Sign in or learn about subscription options.pp. 205-210
by J. Noguera, R.M. Badia
Extended quasi-static scheduling for formal synthesis and code generation of embedded softwareFull-text access may be available. Sign in or learn about subscription options.pp. 211,212,213,214,215,216
by Feng-Shi Su, Pao-Ann Hsiung
Authors indexFreely available from IEEE.pp. 217
CODES'02 Committee ListingFreely available from IEEE.pp. vii
Additional RefereesFreely available from IEEE.pp. viii
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