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14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems

Apr. 13 2011 to Apr. 15 2011

Cottbus Germany

ISBN: 978-1-4244-9755-3

Table of Contents

[Copyright notice]Freely available from IEEE.pp. 1-1
Design technology and the cloudFreely available from IEEE.pp. 1-1
SiGe BiCMOS platform - baseline technology for More Than Moore process module integrationFull-text access may be available. Sign in or learn about subscription options.pp. 4-4
Testing and design-for-testability solutions for 3D integrated circuitsFull-text access may be available. Sign in or learn about subscription options.pp. 5-5
Introduction to the SystemC AMS extension standardFull-text access may be available. Sign in or learn about subscription options.pp. 6-8
Small scale energy harvesting - principles, practices and future trendsFull-text access may be available. Sign in or learn about subscription options.pp. 9-9
Conversion and interfacing techniques for asynchronous circuitsFull-text access may be available. Sign in or learn about subscription options.pp. 11-16
A system-level platform for dependability enhancement and its analysis for mixed-signal SoCsFull-text access may be available. Sign in or learn about subscription options.pp. 17-22
Dual use of power lines for data communications in microprocessorsFull-text access may be available. Sign in or learn about subscription options.pp. 23-28
PVT tolerant LC-VCO in 90 nm CMOS technology for GPS/Galileo applicationsFull-text access may be available. Sign in or learn about subscription options.pp. 29-34
Design-for-Test method for high-speed ADCs: Behavioral description and optimizationFull-text access may be available. Sign in or learn about subscription options.pp. 35-40
Cost-efficient 130nm TSMC Forward Transform and Quantization for H.264/AVC encodersFull-text access may be available. Sign in or learn about subscription options.pp. 47-52
Towards an unified IP verification and robustness analysis platformFull-text access may be available. Sign in or learn about subscription options.pp. 53-58
Defect-oriented module-level fault diagnosis in digital circuitsFull-text access may be available. Sign in or learn about subscription options.pp. 81-86
Efficient diagnostics algorithms for regular computing structuresFull-text access may be available. Sign in or learn about subscription options.pp. 87-92
SAT-based analysis of sensitisable pathsFull-text access may be available. Sign in or learn about subscription options.pp. 93-98
Wireless wafer-level testing of integrated circuits via capacitively-coupled channelsFull-text access may be available. Sign in or learn about subscription options.pp. 99-104
Optimal number and placement of Through Silicon Vias in 3D Network-on-ChipFull-text access may be available. Sign in or learn about subscription options.pp. 105-110
An all-digital on-chip PMOS and NMOS process variability monitor utilizing shared buffer ring and ring oscillatorFull-text access may be available. Sign in or learn about subscription options.pp. 115-120
Low-complexity integrated circuit aging monitorFull-text access may be available. Sign in or learn about subscription options.pp. 121-125
A 5Gb/s equalizer for USB 3.0 receiver in 65 nm CMOS technologyFull-text access may be available. Sign in or learn about subscription options.pp. 131-134
Fault tolerance of SRAM-based FPGA via configuration framesFull-text access may be available. Sign in or learn about subscription options.pp. 139-142
A new hierarchical built-in self-test with on-chip diagnosis for VLIW processorsFull-text access may be available. Sign in or learn about subscription options.pp. 143-146
A chaos-based pseudo-random bit generator implemented in FPGA deviceFull-text access may be available. Sign in or learn about subscription options.pp. 151-154
Software defined radio - design and implementation of complete platformFull-text access may be available. Sign in or learn about subscription options.pp. 155-158
Influence of parasitic memory effect on single-cell faults in SRAMsFull-text access may be available. Sign in or learn about subscription options.pp. 159-162
Behavioral model of TRNG based on oscillator rings implemented in FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 163-166
Indirect detection of clock skew induced hold-time violations on functional paths using scan shift operationsFull-text access may be available. Sign in or learn about subscription options.pp. 175-178
Decomposition of multi-output logic function in Reed-Muller spectral domainFull-text access may be available. Sign in or learn about subscription options.pp. 179-182
Muller C-elements based on minority-3 functions for ultra low voltage suppliesFull-text access may be available. Sign in or learn about subscription options.pp. 195-200
Power consumption traces realignment to improve differential power analysisFull-text access may be available. Sign in or learn about subscription options.pp. 201-206
Fault injection analysis of transient faults in clustered VLIW processorsFull-text access may be available. Sign in or learn about subscription options.pp. 207-212
Implementation of Selective Fault Tolerance with conventional synthesis toolsFull-text access may be available. Sign in or learn about subscription options.pp. 213-218
Optimal spare utilization for reliability and mean lifetime improvement of logic built-in self-repairFull-text access may be available. Sign in or learn about subscription options.pp. 219-224
Hardware architecture for packet classification with prefix coloringFull-text access may be available. Sign in or learn about subscription options.pp. 231-236
Communication modelling and synthesis for NoC-based systems with real-time constraintsFull-text access may be available. Sign in or learn about subscription options.pp. 237-242
Optimization of message encryption for distributed embedded systems with real-time constraintsFull-text access may be available. Sign in or learn about subscription options.pp. 243-248
Manufacturing variability analysis in Carbon Nanotube Technology: A comparison with bulk CMOS in 6T SRAM scenarioFull-text access may be available. Sign in or learn about subscription options.pp. 249-254
Characterization of digital cells for statistical testFull-text access may be available. Sign in or learn about subscription options.pp. 255-260
Receiver OEIC using a bipolar translinear loopFull-text access may be available. Sign in or learn about subscription options.pp. 267-270
Abstract modeling and simulation based selective estimationFull-text access may be available. Sign in or learn about subscription options.pp. 275-278
Fast just-in-time translated simulator for ASIP designFull-text access may be available. Sign in or learn about subscription options.pp. 279-282
CAD tool for PLL DesignFull-text access may be available. Sign in or learn about subscription options.pp. 283-286
Verification of JPEG2000 encoder based on rate and distortion curve analysisFull-text access may be available. Sign in or learn about subscription options.pp. 289-292
Failure probability of SRAM-FPGA systems with Stochastic Activity NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 293-296
Improving performance of robust Self Adaptive Caches by optimizing the switching algorithmFull-text access may be available. Sign in or learn about subscription options.pp. 297-300
Sample synchronization of multiple multiplexed DA and AD converters in FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 301-304
Hardware efficient design of Variable Length FFT ProcessorFull-text access may be available. Sign in or learn about subscription options.pp. 309-312
High-performance hardware accelerators for sorting and managing prioritiesFull-text access may be available. Sign in or learn about subscription options.pp. 313-318
Precise IPv4/IPv6 packet generator based on NetCOPE platformFull-text access may be available. Sign in or learn about subscription options.pp. 319-324
Effective hash-based IPv6 longest prefix matchFull-text access may be available. Sign in or learn about subscription options.pp. 325-328
Stacking order impact on overall 3D die-to-wafer Stacked-IC costFull-text access may be available. Sign in or learn about subscription options.pp. 335-340
A memetic algorithm for computing 3D capacitance in multiconductor VLSI circuitsFull-text access may be available. Sign in or learn about subscription options.pp. 341-346
Optimized embedded memory diagnosisFull-text access may be available. Sign in or learn about subscription options.pp. 347-352
On using a SPICE-like TSTAC™ eFlash model for design and testFull-text access may be available. Sign in or learn about subscription options.pp. 359-364
Statistical analysis of 6T SRAM data retention voltage under process variationFull-text access may be available. Sign in or learn about subscription options.pp. 365-370
Decreasing test time by scan chain reorganizationFull-text access may be available. Sign in or learn about subscription options.pp. 371-374
Max-Fill: A method to generate high quality delay testsFull-text access may be available. Sign in or learn about subscription options.pp. 375-380
Measurement point selection for in-operation wear-out monitoringFull-text access may be available. Sign in or learn about subscription options.pp. 381-386
Test vector overlapping based compression tool for narrow test access mechanismFull-text access may be available. Sign in or learn about subscription options.pp. 387-392
A 20 pJ/b (10 µW) digital receiver based on a new modulation (SAS) for retinal prosthesis applicationFull-text access may be available. Sign in or learn about subscription options.pp. 393-394
Advanced fault tolerant bus for multicore system implemented in FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 397-398
Validation and optimization of TMR protections for circuits in radiation environmentsFull-text access may be available. Sign in or learn about subscription options.pp. 399-400
Reduction of FPGA resources for regular expression matching by relation similarityFull-text access may be available. Sign in or learn about subscription options.pp. 401-402
Low-power quadrature VCO design for medical implant communication serviceFull-text access may be available. Sign in or learn about subscription options.pp. 403-404
Current sensing methodology for completion detection in self-timed systemsFull-text access may be available. Sign in or learn about subscription options.pp. 405-406
A wireless ECG sensor node based on Huffman data encoderFull-text access may be available. Sign in or learn about subscription options.pp. 411-412
Advanced rectifier and driver for analog VU meterFull-text access may be available. Sign in or learn about subscription options.pp. 413-414
Automatic property generation for the formal verification of bus bridgesFull-text access may be available. Sign in or learn about subscription options.pp. 417-422
Probabilistic equivalence checking based on high-level decision diagramsFull-text access may be available. Sign in or learn about subscription options.pp. 423-428
Proof certificates and non-linear arithmetic constraintsFull-text access may be available. Sign in or learn about subscription options.pp. 429-434
TLM protocol compliance checking at the Electronic System LevelFull-text access may be available. Sign in or learn about subscription options.pp. 435-440
Behavior of CMOS polymorphic circuits in high temperature environmentFull-text access may be available. Sign in or learn about subscription options.pp. 447-452
Dynamic placement applications into Self Adaptive network on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 453-456
Minimal physical resource allocation of pi-calculus schedules to dynamically reconfigurable platformsFull-text access may be available. Sign in or learn about subscription options.pp. 457-462
TTTC: Test Technology Technical CouncilFreely available from IEEE.pp. 1-3
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