Default Cover Image

2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)

April 22 2015 to April 24 2015

Belgrade, Serbia

Table of Contents

Title Page iFreely available from IEEE.pp. i-i
Title Page iiiFreely available from IEEE.pp. iii-iii
Copyright PageFreely available from IEEE.pp. iv-iv
Table of ContentsFreely available from IEEE.pp. v-x
Foreword to the 18th IEEE DDECS SymposiumFreely available from IEEE.pp. xi-xi
Symposium CommitteesFreely available from IEEE.pp. xii-xii
DDECS 2015 SponsorsFreely available from IEEE.pp. xiii-xiii
KeynotesFreely available from IEEE.pp. xiv-xvi
Embedded TutorialsFreely available from IEEE.pp. xvii-xviii
TPG for Crosstalk Faults between On-Chip Aggressor and Victim Using Genetic AlgorithmsFull-text access may be available. Sign in or learn about subscription options.pp. 3-8
LFSR Reseeding Based Test Compression Respecting Different Controllability of Decompressor OutputsFull-text access may be available. Sign in or learn about subscription options.pp. 9-14
Low-Area and High-Speed Approximate Matrix-Vector MultiplierFull-text access may be available. Sign in or learn about subscription options.pp. 23-28
A Design for the 178-MHz WXGA 30-fps Optical Flow Processor Based on the HOE AlgorithmFull-text access may be available. Sign in or learn about subscription options.pp. 31-36
A Design of Ring Oscillator Based PUF on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 37-42
Design-for-Diagnosis Architecture for Power SwitchesFull-text access may be available. Sign in or learn about subscription options.pp. 43-48
A Novel Compact Dual-Band Bandpass Waveguide FilterFull-text access may be available. Sign in or learn about subscription options.pp. 51-56
Fully Differential Difference Amplifier for Low-Noise ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 57-62
A Low Ripple Current Mode Voltage DoublerFull-text access may be available. Sign in or learn about subscription options.pp. 63-68
SystemC-Based Loose Models for Simulation Speed-Up by Abstraction of RTL IP CoresFull-text access may be available. Sign in or learn about subscription options.pp. 71-74
A Synchronous Mirror Delay with Duty-Cycle Tunable TechnologyFull-text access may be available. Sign in or learn about subscription options.pp. 79-82
Design of In AlN/GaN Heterostructure-Based Logic CellsFull-text access may be available. Sign in or learn about subscription options.pp. 83-86
Triangular Modulation Using Switched-Capacitor Scheme for Spread-Spectrum ClockingFull-text access may be available. Sign in or learn about subscription options.pp. 87-90
Application of Evolutionary Algorithms for Regression Suites OptimizationFull-text access may be available. Sign in or learn about subscription options.pp. 91-94
Combining Correction of Delay Faults and Transient FaultsFull-text access may be available. Sign in or learn about subscription options.pp. 99-102
Fast Simulation of SystemC Synthesizable SubsetFull-text access may be available. Sign in or learn about subscription options.pp. 103-106
Direct Test Methodology for HDL VerificationFull-text access may be available. Sign in or learn about subscription options.pp. 115-118
Modeling CMOS Gates Using Equivalent InvertersFull-text access may be available. Sign in or learn about subscription options.pp. 119-122
UVM-based Verification of Bluetooth Low Energy ControllerFull-text access may be available. Sign in or learn about subscription options.pp. 123-124
BSIM4 to PSP Model Conversion for Passive Mixer IM3 SimulationFull-text access may be available. Sign in or learn about subscription options.pp. 137-142
FPGA Prototyping and Accelerated Verification of ASIPsFull-text access may be available. Sign in or learn about subscription options.pp. 145-148
Performance Enhancement of Serial Based FPGA Probabilistic Fault Emulation TechniquesFull-text access may be available. Sign in or learn about subscription options.pp. 149-152
Parameterized Critical Path Selection for Delay Fault TestingFull-text access may be available. Sign in or learn about subscription options.pp. 153-156
Mapping Trained Neural Networks to FPNNsFull-text access may be available. Sign in or learn about subscription options.pp. 157-160
Synthesis and Optimization of Switching NanoarraysFull-text access may be available. Sign in or learn about subscription options.pp. 161-164
Modeling the Coupling through Substrate for Frequencies up to 100GHzFull-text access may be available. Sign in or learn about subscription options.pp. 165-168
Contradiction Analysis for Inconsistent Formal ModelsFull-text access may be available. Sign in or learn about subscription options.pp. 171-176
Equivalence Checking on System Level Using a Priori KnowledgeFull-text access may be available. Sign in or learn about subscription options.pp. 177-182
Requirement Phrasing Assistance Using Automatic Quality AssessmentFull-text access may be available. Sign in or learn about subscription options.pp. 183-188
A Design Preconditioning Flow for Low-Noise CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 191-196
Containment of Metastable Voltages in FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 197-202
Design Flow for Radhard TMR Flip-FlopsFull-text access may be available. Sign in or learn about subscription options.pp. 203-208
Intermittent Resistive Faults in Digital CMOS CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 211-216
A Coarse Model for Estimation of Switching Noise Coupling in Lightly Doped SubstratesFull-text access may be available. Sign in or learn about subscription options.pp. 217-222
Activity Profiling and Power Estimation for Embedded Wireless Sensor Node DesignFull-text access may be available. Sign in or learn about subscription options.pp. 231-236
Embedded Test Instrument for On-Chip Phase Noise Evaluation of Analog/IF SignalsFull-text access may be available. Sign in or learn about subscription options.pp. 237-242
A Delay Measurement Mechanism for Asynchronous Circuits of Bundled-Data ModelFull-text access may be available. Sign in or learn about subscription options.pp. 243-248
New Fault Models and Self-Test Generation for Microprocessors Using High-Level Decision DiagramsFull-text access may be available. Sign in or learn about subscription options.pp. 251-254
Power-Management Specification in SystemCFull-text access may be available. Sign in or learn about subscription options.pp. 259-262
Implementation of the ADELITE Microcontroller for Biomedical ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 271-274
High Precision Digital Based 3.8GHz Phase ShifterFull-text access may be available. Sign in or learn about subscription options.pp. 275-278
Generic Self Repair Architecture with On-Line Fault DiagnosisFull-text access may be available. Sign in or learn about subscription options.pp. 279-282
Analog Circuitry for BLDC Motor Magnetic Saturation DiagnosticFull-text access may be available. Sign in or learn about subscription options.pp. 287-290
High Throughput Floating-Point Dividers Implemented in FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 291-294
Formal Verification of Software for the Contiki Operating System Considering InterruptsFull-text access may be available. Sign in or learn about subscription options.pp. 295-298
Wireless Heart Rate Monitor in Personal Emergency Response SystemFull-text access may be available. Sign in or learn about subscription options.pp. 299-300
Hardware Implementation of a RSS Localization Algorithm for Wireless Capsule EndoscopyFull-text access may be available. Sign in or learn about subscription options.pp. 301-304
Author IndexFreely available from IEEE.pp. 305-307
Publisher's InformationFreely available from IEEE.pp. 308-308
Showing 70 out of 70