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2017 Euromicro Conference on Digital System Design (DSD)

Aug. 30 2017 to Sept. 1 2017

Vienna, Austria

Table of Contents

[Title page i]Freely available from IEEE.pp. i-i
[Title page iii]Freely available from IEEE.pp. iii-iii
[Copyright notice]Freely available from IEEE.pp. iv-iv
Table of contentsFreely available from IEEE.pp. v-xii
Message from the General ChairsFreely available from IEEE.pp. xiii-xiii
Message from the Program ChairsFreely available from IEEE.pp. xiv-xv
DSD 2017 CommitteesFreely available from IEEE.pp. xvi-xvi
Program CommitteeFreely available from IEEE.pp. xvii-xxiii
Additional ReviewersFreely available from IEEE.pp. xxiv-xxiv
KeynotesFull-text access may be available. Sign in or learn about subscription options.pp. xxv-xxviii
Building a Better Random Number Generator for Stochastic ComputingFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
Rapid Estimation of Power-Management Unit Overhead from System-Level SpecificationFull-text access may be available. Sign in or learn about subscription options.pp. 9-13
Loop Overhead Reduction Techniques for Coarse Grained Reconfigurable ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 14-21
An Aspect and Transaction Oriented Programming, Design and Verification Language (PDVL)Full-text access may be available. Sign in or learn about subscription options.pp. 30-39
Static Write Buffer Cache Modeling to Increase Host-Compiled Simulation AccuracyFull-text access may be available. Sign in or learn about subscription options.pp. 47-53
Assertion-Based Verification for SoC Models and Identification of Key EventsFull-text access may be available. Sign in or learn about subscription options.pp. 54-61
A Hardware/Software Codesign for the Chemical Reactivity of BRAMSFull-text access may be available. Sign in or learn about subscription options.pp. 70-77
Nepteron Processor for Real-Time Computation of Conductance-Based Neuronal NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 78-85
System-Aware Performance Monitoring Unit for RISC-V ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 86-93
SPEED: Open-Source Framework to Accelerate Speech Recognition on Embedded GPUsFull-text access may be available. Sign in or learn about subscription options.pp. 94-101
EventIRQ: An Event Based and Priority Aware IRQ Handling for Multi-tasking EnvironmentsFull-text access may be available. Sign in or learn about subscription options.pp. 102-110
Acceleration Techniques for System-Hyper-Pipelined Soft-Processors on FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 119-128
Composition of Switching Lattices and Autosymmetric Boolean Function SynthesisFull-text access may be available. Sign in or learn about subscription options.pp. 137-144
Performance Targeted Minimization of Incompletely Specified Finite State Machines for Implementation in FPGA DevicesFull-text access may be available. Sign in or learn about subscription options.pp. 145-150
Analysis and Visualization of Product Memory Layout in IP-XACTFull-text access may be available. Sign in or learn about subscription options.pp. 155-162
SAT-Based Generation of Optimum Function Implementations with XOR GatesFull-text access may be available. Sign in or learn about subscription options.pp. 163-170
Scalable and Power-Efficient Implementation of an Asynchronous Router with Buffer SharingFull-text access may be available. Sign in or learn about subscription options.pp. 171-178
Packet Classification with Limited Memory ResourcesFull-text access may be available. Sign in or learn about subscription options.pp. 179-183
A Distributed NUCA Architecture Using an Efficient NoC Multicasting SupportFull-text access may be available. Sign in or learn about subscription options.pp. 184-191
Automatic Control Flow Generation for OpenVX GraphsFull-text access may be available. Sign in or learn about subscription options.pp. 198-204
Higher-Order Side-Channel Protected Implementations of KECCAKFull-text access may be available. Sign in or learn about subscription options.pp. 205-212
Lightweight Software Encryption for Embedded ProcessorsFull-text access may be available. Sign in or learn about subscription options.pp. 213-220
How Microprobing Can Attack Encrypted MemoryFull-text access may be available. Sign in or learn about subscription options.pp. 244-251
Thermal Sensor Based Hardware Trojan Detection in FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 268-273
Analysis and Inner-Round Pipelined Implementation of Selected Parallelizable CAESAR Competition CandidatesFull-text access may be available. Sign in or learn about subscription options.pp. 274-282
Counterfeit IC Detection By Image Texture AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 283-286
Run-Time Effect by Inserting Hardware Trojans, in Combinational CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 287-290
Exploiting Quantum Gates in Secure ComputationFull-text access may be available. Sign in or learn about subscription options.pp. 291-294
IoT Components LifeCycle Based Security AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 295-298
SAT-Based ATPG for Zero-Aliasing CompactionFull-text access may be available. Sign in or learn about subscription options.pp. 307-314
PCG: Partially Clock-Gating Approach to Reduce the Power Consumption of Fault-Tolerant Register FilesFull-text access may be available. Sign in or learn about subscription options.pp. 323-328
Setup for an Experimental Study of Radiation Effects in 65nm CMOSFull-text access may be available. Sign in or learn about subscription options.pp. 329-336
Reliability Analysis and Improvement of FPGA-Based Robot ControllerFull-text access may be available. Sign in or learn about subscription options.pp. 337-344
Thermal Effect on Performance, Power, and BTI Aging in FinFET-Based DesignsFull-text access may be available. Sign in or learn about subscription options.pp. 345-351
On Dependability Assessment of Fault Tolerant Systems by Means of Statistical Model CheckingFull-text access may be available. Sign in or learn about subscription options.pp. 352-355
A Probabilistic Context-Free Grammar Based Random Test Program GenerationFull-text access may be available. Sign in or learn about subscription options.pp. 356-359
Dependability Prediction Involving Temporal Redundancy and the Effect of Transient FaultsFull-text access may be available. Sign in or learn about subscription options.pp. 360-363
A 3D Time-of-Flight Mixed-Criticality System for Environment PerceptionFull-text access may be available. Sign in or learn about subscription options.pp. 368-374
A Subplatooning Strategy for Safe Braking ManeuversFull-text access may be available. Sign in or learn about subscription options.pp. 375-382
On the Benefits of Multicores for Real-Time SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 383-389
FPGA-Centric High Performance Embedded Computing: Challenges and TrendsFull-text access may be available. Sign in or learn about subscription options.pp. 390-395
A Survey on Open-Source Flight Control Platforms of Unmanned Aerial VehicleFull-text access may be available. Sign in or learn about subscription options.pp. 396-402
Mixed Time-Criticality Process Interferences Characterization on a Multicore Linux SystemFull-text access may be available. Sign in or learn about subscription options.pp. 427-434
Model-Based Function Mapping and Bandwidth Reservation for Mixed-Critical Adaptive SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 435-439
Hardware Platforms Benchmark For Real-Time Polyp DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 451-455
Towards a Safe Software Development EnvironmentFull-text access may be available. Sign in or learn about subscription options.pp. 470-477
Security & Trusted Devices in the Context of Internet of Things (IoT)Full-text access may be available. Sign in or learn about subscription options.pp. 502-509
Designing a Synthetic Aperture Radar’s Data Formatting and Antenna Gyro Stabilizing ModuleFull-text access may be available. Sign in or learn about subscription options.pp. 520-523
Two-Phase Interarrival Time Prediction for Runtime Resource ManagementFull-text access may be available. Sign in or learn about subscription options.pp. 524-528
Low-Cost Sub-5W Processors for Edge HPCFull-text access may be available. Sign in or learn about subscription options.pp. 529-532
A Methodology for Predicting Application-Specific Achievable Memory Bandwidth for HW/SW-CodesignFull-text access may be available. Sign in or learn about subscription options.pp. 533-537
Adaptive Reliability for Fault Tolerant Multicore SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 538-542
Optimal Placement of Heterogeneous Uncore Component in 3D Chip-MultiprocessorsFull-text access may be available. Sign in or learn about subscription options.pp. 547-551
Author indexFreely available from IEEE.pp. 552-555
[Publisher's information]Freely available from IEEE.pp. 556-556
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