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2018 21st Euromicro Conference on Digital System Design (DSD)

Aug. 29 2018 to Aug. 31 2018

Prague, Czech Republic

Table of Contents

Title Page iFreely available from IEEE.pp. 1-1
Title Page iiiFreely available from IEEE.pp. 3-3
Copyright PageFreely available from IEEE.pp. 4-4
Table of ContentsFreely available from IEEE.pp. 5-18
Message from the General ChairFreely available from IEEE.pp. 19-19
Message from the Program ChairsFreely available from IEEE.pp. 20-21
DSD 2018 CommitteesFreely available from IEEE.pp. 22-22
DSD 2018 Program CommitteeFreely available from IEEE.pp. 23-33
Additional ReviewersFreely available from IEEE.pp. 34-34
Memory Aware Packet Matching Architecture for High-Speed NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
High-Speed Configuration Strategy for Configurable Logic Block-Based TCAM Architecture on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 16-21
Measurement Based Execution Time Analysis of GPGPU Programs via SE+GAFull-text access may be available. Sign in or learn about subscription options.pp. 30-37
Heavy-Hitter Detection Using a Hardware Sketch with the Countmin-CU AlgorithmFull-text access may be available. Sign in or learn about subscription options.pp. 38-45
A Novel Hardware-Accelerated Priority Queue for Real-Time SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 46-53
Datawidth-Aware Energy-Efficient Multipliers: A Case for Going Sign MagnitudeFull-text access may be available. Sign in or learn about subscription options.pp. 54-61
Trends in On-chip Dynamic Resource ManagementFull-text access may be available. Sign in or learn about subscription options.pp. 62-69
FPGA Placement Improvement Using a Genetic Algorithm and the Routing Algorithm as a Cost FunctionFull-text access may be available. Sign in or learn about subscription options.pp. 70-76
Fault-Tolerant Deployment of Dataflow Applications Using Virtual ProcessorsFull-text access may be available. Sign in or learn about subscription options.pp. 77-84
Multimodal Image Registration between SWIR and LWIR Images in an Embedded SystemFull-text access may be available. Sign in or learn about subscription options.pp. 91-98
A Reconfigurable Fractional Interpolation Hardware for VVC Motion CompensationFull-text access may be available. Sign in or learn about subscription options.pp. 99-103
High-Throughput One-Channel RS(255,239) DecoderFull-text access may be available. Sign in or learn about subscription options.pp. 110-114
Compositional Dataflow Modelling for Cyclo-Static ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 121-129
Modeling RISC-V Processor in IP-XACTFull-text access may be available. Sign in or learn about subscription options.pp. 140-147
KETCube – The Universal Prototyping IoT PlatformFull-text access may be available. Sign in or learn about subscription options.pp. 148-154
Flexible and Resource Efficient FPGA-Based Quad Data Rate Memory Interface Design for High-Speed Data Acquisition SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 155-158
Design and Implementation of an HCI Based Peer to Peer APDU ProtocolFull-text access may be available. Sign in or learn about subscription options.pp. 159-162
Visualization of Memory Map Information in Embedded System DesignFull-text access may be available. Sign in or learn about subscription options.pp. 163-166
A Versatile PCM-Based Circuits Emulator and Its Use on Implementing Linear Algebra FunctionsFull-text access may be available. Sign in or learn about subscription options.pp. 167-171
DUSTER: DUal Source Write TERmination Method for STT-RAM MemoriesFull-text access may be available. Sign in or learn about subscription options.pp. 182-189
Error Correctable Approximate Multiplier with Area/Power Efficient Design Through Mixed CMOS/PTLFull-text access may be available. Sign in or learn about subscription options.pp. 190-195
Effect of FPGA Circuit Implementation on Error Detection Using Logic Implication CheckingFull-text access may be available. Sign in or learn about subscription options.pp. 196-200
Program Generation Through a Probabilistic Constrained GrammarFull-text access may be available. Sign in or learn about subscription options.pp. 214-220
MOMENT: A Cross-Layer Method to Mitigate Multiple Event Transients in Combinational CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 237-243
Segmentation of Hyperspectral Images Using Quantized Convolutional Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 260-267
Design of a Low-Level Radar and Time-of-Flight Sensor Fusion FrameworkFull-text access may be available. Sign in or learn about subscription options.pp. 268-275
Design and Implementation of Low-Cost LK Optical Flow Computation for Images of Single and Multiple LevelsFull-text access may be available. Sign in or learn about subscription options.pp. 276-279
Intelligent Security Measures for Smart Cyber Physical SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 280-287
Designing Energy Efficient Approximate Multipliers for Neural AccelerationFull-text access may be available. Sign in or learn about subscription options.pp. 288-295
Stability Verification of Self-Timed Control Systems Using Model-CheckingFull-text access may be available. Sign in or learn about subscription options.pp. 312-319
Circuit Inspired Modeling Method for IrrigationFull-text access may be available. Sign in or learn about subscription options.pp. 328-335
A Heuristic for Variable Re-Entrant Scheduling ProblemsFull-text access may be available. Sign in or learn about subscription options.pp. 336-341
Building Distributed Co-Simulations Using CoHLAFull-text access may be available. Sign in or learn about subscription options.pp. 342-346
RailCheck: A WSN-Based System for Condition Monitoring of Railway InfrastructureFull-text access may be available. Sign in or learn about subscription options.pp. 347-351
Co-simulation Framework for Control, Communication and Traffic for Vehicle PlatoonsFull-text access may be available. Sign in or learn about subscription options.pp. 352-356
Quantization of Constrained Processor Data Paths Applied to Convolutional Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 357-364
CoNNA – Compressed CNN Hardware AcceleratorFull-text access may be available. Sign in or learn about subscription options.pp. 365-372
Run-time Mapping Algorithm for Dynamic Workloads on Heterogeneous MPSoCs PlatformsFull-text access may be available. Sign in or learn about subscription options.pp. 373-380
FPGA Based Reconfigurable Coprocessor for Deep Convolutional Neural Network TrainingFull-text access may be available. Sign in or learn about subscription options.pp. 381-388
Generation of a Diagnosis Model for Hybrid-Electric Vehicles Using Machine LearningFull-text access may be available. Sign in or learn about subscription options.pp. 389-396
ADONN: Adaptive Design of Optimized Deep Neural Networks for Embedded SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 397-404
Inter-Patient ECG Classification Using Deep Convolutional Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 421-425
Self-Aware Wearable Systems in Epileptic Seizure DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 426-432
MATISSE: A Smart Hospital EcosystemFull-text access may be available. Sign in or learn about subscription options.pp. 464-471
A Novel Low-Complexity VLSI Architecture for an EEG Feature Extraction PlatformFull-text access may be available. Sign in or learn about subscription options.pp. 472-478
Towards Spectral Pulse Oximetry Independent of Motion ArtifactsFull-text access may be available. Sign in or learn about subscription options.pp. 479-483
Toward an OFDM-Based Technique for Electrochemical Impedance SpectroscopyFull-text access may be available. Sign in or learn about subscription options.pp. 484-487
Design and Evaluation of a Low Power CGRA Accelerator for Biomedical Signal ProcessingFull-text access may be available. Sign in or learn about subscription options.pp. 488-491
Guards in Action: First-Order SCA Secure Implementations of Ketje Without Additional RandomnessFull-text access may be available. Sign in or learn about subscription options.pp. 492-499
OpenSSL Bellcore's Protection Helps Fault AttackFull-text access may be available. Sign in or learn about subscription options.pp. 500-507
An FPGA Hardware Trojan Detection Approach Based on Multiple Parameter AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 516-522
Dummy Rounds as a DPA Countermeasure in HardwareFull-text access may be available. Sign in or learn about subscription options.pp. 523-528
An Improved Analysis of Reliability and Entropy for Delay PUFsFull-text access may be available. Sign in or learn about subscription options.pp. 553-560
Correlation Power Analysis Distinguisher Based on the Correlation Trace DerivativeFull-text access may be available. Sign in or learn about subscription options.pp. 565-568
Feasibility of FPGA Accelerated IPsec on CloudFull-text access may be available. Sign in or learn about subscription options.pp. 569-572
Exploiting Phase Information in Thermal Scans for Stealthy Trojan DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 573-576
On the Design of a Processor Working Over Encrypted DataFull-text access may be available. Sign in or learn about subscription options.pp. 577-580
Design and Implementation of a Privacy Framework for the Internet of Things (IoT)Full-text access may be available. Sign in or learn about subscription options.pp. 586-591
The AQUAS ECSEL ProjectFull-text access may be available. Sign in or learn about subscription options.pp. 592-599
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