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East-West Design & Test Symposium

Sept. 17 2010 to Sept. 20 2010

St. Petersburg, Russia

ISBN: 978-1-4244-9555-9

Table of Contents

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ContentsFreely available from IEEE.pp. 1-8
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Facilitating testability of TLM FIFO: SystemC implementationsFull-text access may be available. Sign in or learn about subscription options.pp. 428-431
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Authors indexFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
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Title pageFreely available from IEEE.pp. 1
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Code optimization for enhancing SystemC simulation timeFull-text access may be available. Sign in or learn about subscription options.pp. 431-434
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Modeling on-chip variations in digital circuits using statistical timing analysisFull-text access may be available. Sign in or learn about subscription options.pp. 37-39
[Copyright notice]Freely available from IEEE.pp. 1-1
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Fault tolerance of decomposed PLAsFull-text access may be available. Sign in or learn about subscription options.pp. 86-91
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Microprogram control unit with code sharing and extended microinstruction formatFull-text access may be available. Sign in or learn about subscription options.pp. 73-76
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Engineering-maintenance methods of the calculation xDSL-linesFull-text access may be available. Sign in or learn about subscription options.pp. 236-241
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Building of the logic network of the information area of the corporationFull-text access may be available. Sign in or learn about subscription options.pp. 371-373
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PDFs testing of combinational circuits based on covering ROBDDsFull-text access may be available. Sign in or learn about subscription options.pp. 160-163
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GA-based and design by contract approach to test generation for EFSMsFull-text access may be available. Sign in or learn about subscription options.pp. 152-155
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An approach for PSL assertion coverage analysis with high-level decision diagramsFull-text access may be available. Sign in or learn about subscription options.pp. 13-16
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Implementation of a new paradigm in design of IIR digital filtersFull-text access may be available. Sign in or learn about subscription options.pp. 156-159
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Thermal aware test scheduling for stacked multi-chip-modulesFull-text access may be available. Sign in or learn about subscription options.pp. 343-349
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Fault grading using Instruction-Execution graphFull-text access may be available. Sign in or learn about subscription options.pp. 350-357
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Self-testing of microcontrollers in the fieldFull-text access may be available. Sign in or learn about subscription options.pp. 43-46
by Janusz Sosnowski
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Improving reliability for bit parallel finite field multipliers using Decimal HammingFull-text access may be available. Sign in or learn about subscription options.pp. 69-72
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Communication interface synthesis from TLM 2.0 to RTLFull-text access may be available. Sign in or learn about subscription options.pp. 222-226
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Sign Language synthesis using hand motion acquisitionFull-text access may be available. Sign in or learn about subscription options.pp. 226-229
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Experiments with ABIST test methodology applied to path delay fault testingFull-text access may be available. Sign in or learn about subscription options.pp. 59-63
by P. Manikandan, Bjorn B. Larsen, Einar J. Aas
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Common-mode signal minimization in differential stageFull-text access may be available. Sign in or learn about subscription options.pp. 242-245
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Exploring modeling and testing of NAND flash memoriesFull-text access may be available. Sign in or learn about subscription options.pp. 47-50
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EDACs and test integration strategies for NAND flash memoriesFull-text access may be available. Sign in or learn about subscription options.pp. 218-221
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Internet applications testing automation through probabilistic-network programmingFull-text access may be available. Sign in or learn about subscription options.pp. 362-365
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Metastability testing at FPGA circuit design using propagation time characterizationFull-text access may be available. Sign in or learn about subscription options.pp. 80-85
by Branka Medved Rogina, Peter Skoda, Karolj Skala, Ivan Michieli, Maja Vlah, Sinisa Marijan
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Methodology of algorithms synthesis of storage devices test diagnosingFull-text access may be available. Sign in or learn about subscription options.pp. 366-370
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ESL design methodology for architecture explorationFull-text access may be available. Sign in or learn about subscription options.pp. 395-401
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Cyber space and brain-like computingFull-text access may be available. Sign in or learn about subscription options.pp. 98-109
by Vladimir, Wajeb, Eugenia, Svetlana
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SAT-based group method for verification of logical descriptions with functional indeterminacyFull-text access may be available. Sign in or learn about subscription options.pp. 25-28
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Between standard cells and transistors: Layout templates for Regular FabricsFull-text access may be available. Sign in or learn about subscription options.pp. 442-448
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An efficient March test for detection of all two-operation dynamic faults from subclass SavFull-text access may be available. Sign in or learn about subscription options.pp. 310-313
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IEEE 1500 compliant test wrapper generation tool for VHDL modelsFull-text access may be available. Sign in or learn about subscription options.pp. 495-499
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Reconfiguration and hardware agents in testing and repair of distributed systemsFull-text access may be available. Sign in or learn about subscription options.pp. 195-198
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Use of predicate categories for modelling of operation of the semantic analyzer of the linguistic processorFull-text access may be available. Sign in or learn about subscription options.pp. 382-385
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A TLM2.0 assertion library with centralized monitoring approachFull-text access may be available. Sign in or learn about subscription options.pp. 402-406
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Component-based safety-oriented on-line testing of digital systemsFull-text access may be available. Sign in or learn about subscription options.pp. 135-140
by A. Drozd, V. Kharchenko, A. Siora, V. Sklyar
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Parameterized IP Infrastructures for fault-tolerant FPGA-based systems: Development, assessment, case-studyFull-text access may be available. Sign in or learn about subscription options.pp. 452-455
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A mixed HDL/PLI test packageFull-text access may be available. Sign in or learn about subscription options.pp. 518-523
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Assertion based verification in TLMFull-text access may be available. Sign in or learn about subscription options.pp. 509-513
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Applied library of adaptive lattice filters for nonstationary signal processingFull-text access may be available. Sign in or learn about subscription options.pp. 149-152
by Victor I. Djigan
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Architecture design and technical methodology for bus testingFull-text access may be available. Sign in or learn about subscription options.pp. 504-509
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Generating test patterns for sequential circuits using random patterns by PLI functionsFull-text access may be available. Sign in or learn about subscription options.pp. 456-461
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Early detection of potentially non-synchronized CDC paths using structural analysis techniqueFull-text access may be available. Sign in or learn about subscription options.pp. 500-503
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The problem of Trojan inclusions in software and hardwareFull-text access may be available. Sign in or learn about subscription options.pp. 449-451
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Near optimal machine learning based random test generationFull-text access may be available. Sign in or learn about subscription options.pp. 420-424
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Test minimization technique for multiple stuck-at faults of combinational circuitFull-text access may be available. Sign in or learn about subscription options.pp. 168-170
by V. Andreeva
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A new paradigm in design of IIR digital filtersFull-text access may be available. Sign in or learn about subscription options.pp. 282-285
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Testable combinational circuit design based on ZDD-implementation of ISOP Boolean functionFull-text access may be available. Sign in or learn about subscription options.pp. 171-174
by S. Ostanin, R. Muchamedov
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Reduction in the number of PAL macrocells for Moore FSM implemented with CPLDFull-text access may be available. Sign in or learn about subscription options.pp. 390-394
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Level quantization effect on accuracy of fast Fourier transform algorithmFull-text access may be available. Sign in or learn about subscription options.pp. 175-178
by G. S. Khanyan
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Advanced topics of FSM design using FPGA educational boards and web-based toolsFull-text access may be available. Sign in or learn about subscription options.pp. 514-517
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The Unicast Feedback models for real-time control protocolFull-text access may be available. Sign in or learn about subscription options.pp. 479-481
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Coverage method for FPGA fault logic blocks by sparesFull-text access may be available. Sign in or learn about subscription options.pp. 51-56
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A method for automatic generation of an RTL-interface from a C++ descriptionFull-text access may be available. Sign in or learn about subscription options.pp. 186-189
by Volodymyr Obrizan
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OFDM-based audio watermarking for electronic radiotelephone identificationFull-text access may be available. Sign in or learn about subscription options.pp. 190-194
by Aleksandr V. Shishkin
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Increase in reliability of on-line testing methods using natural time redundancyFull-text access may be available. Sign in or learn about subscription options.pp. 386-391
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A technique to accelerate the Vector Fitting algorithm for interconnect simulationFull-text access may be available. Sign in or learn about subscription options.pp. 127-130
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On selection of state variables for delay test of identical functional unitsFull-text access may be available. Sign in or learn about subscription options.pp. 200-203
by Aditi Kajala, Gayaprasad Sinsinwar, Rahul Raj Choudhary, Jaynarayan Tudu, Virendra Singh
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Frequency domain techniques for simulation of oscillatorsFull-text access may be available. Sign in or learn about subscription options.pp. 131-134
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Extended complete switch as ideal system networkFull-text access may be available. Sign in or learn about subscription options.pp. 530-534
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Hardware description language based on message passing and implicit pipeliningFull-text access may be available. Sign in or learn about subscription options.pp. 438-441
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Schematic protection method from influence of total ionization dose effects on threshold voltage of MOS transistorsFull-text access may be available. Sign in or learn about subscription options.pp. 407-409
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5V tolerant power clamps for mixed-voltage IC's in 65nm 2.5V salicided CMOS technologyFull-text access may be available. Sign in or learn about subscription options.pp. 434-437
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Generalized faulty block model for automatic test pattern generationFull-text access may be available. Sign in or learn about subscription options.pp. 141-143
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Image compression: Comparative analysis of basic algorithmsFull-text access may be available. Sign in or learn about subscription options.pp. 534-537
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An algorithm of timing recovery for modem with M-ary alphabets APK-signalsFull-text access may be available. Sign in or learn about subscription options.pp. 230-235
by Victor V. Panteleev
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Low cost error tolerant motion estimation for H.264/AVC standardFull-text access may be available. Sign in or learn about subscription options.pp. 461-465
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FREP: A soft error resilient pipelined RISC architectureFull-text access may be available. Sign in or learn about subscription options.pp. 330-333
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Algebra-logical repair method for FPGA logic blocksFull-text access may be available. Sign in or learn about subscription options.pp. 482-487
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Optimization of sensitivity dominating parameters OA in selective IP blocksFull-text access may be available. Sign in or learn about subscription options.pp. 246-249
by Sergei G. Krutchinsky
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Technology for faulty blocks coverage by sparesFull-text access may be available. Sign in or learn about subscription options.pp. 473-478
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FPGA FFT implementationFull-text access may be available. Sign in or learn about subscription options.pp. 183-185
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Testing and verification of HDL-models for SoC componentsFull-text access may be available. Sign in or learn about subscription options.pp. 77-82
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Performance investigation of antenna arrays by means of virtual instrumentsFull-text access may be available. Sign in or learn about subscription options.pp. 258-261
by Victor I. Djigan
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Level quantization effects in digital signal processing by discrete Fourier transform methodFull-text access may be available. Sign in or learn about subscription options.pp. 262-265
by G. S. Khanyan
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On-chip measurements of standard-cell propagation delayFull-text access may be available. Sign in or learn about subscription options.pp. 179-181
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COMPAS — Advanced test compressorFull-text access may be available. Sign in or learn about subscription options.pp. 543-548
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System in Package. Diagnosis and embedded repairFull-text access may be available. Sign in or learn about subscription options.pp. 468-472
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Two-criterial DSSS synchronization method efficiency researchFull-text access may be available. Sign in or learn about subscription options.pp. 289-299
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A digital implementation of multi-h CPM modemFull-text access may be available. Sign in or learn about subscription options.pp. 271-273
by G. V. Kulikov, A. U. Unger, P. G. Suhanov
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Architecture of queued-free crossbar for on-chip networksFull-text access may be available. Sign in or learn about subscription options.pp. 34-36
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Security risks in hardware: Implementation and detection problemFull-text access may be available. Sign in or learn about subscription options.pp. 425-427
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Verification of FPGA electronic designs for nuclear reactor trip systems: test- and invariant-based methodsFull-text access may be available. Sign in or learn about subscription options.pp. 92-97
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Evolutionary approach to test generation of sequential digital circuits with multiple observation time strategyFull-text access may be available. Sign in or learn about subscription options.pp. 286-291
by Yu.A. Skobtsov, V.Yu. Skobtsov
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Development of the data-driven readout ASIC for microstrip detectorsFull-text access may be available. Sign in or learn about subscription options.pp. 374-375
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Component architecture with runtime type definitionFull-text access may be available. Sign in or learn about subscription options.pp. 315-318
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Quantization step dispersion of direct transformation ADCFull-text access may be available. Sign in or learn about subscription options.pp. 274-277
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An entropic approach to diagnostic information compressionFull-text access may be available. Sign in or learn about subscription options.pp. 292-299
by Dmitriy Speranskiy
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Vector logic analysis of associative matricesFull-text access may be available. Sign in or learn about subscription options.pp. 110-117
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FPGA-based digital phase difference meterFull-text access may be available. Sign in or learn about subscription options.pp. 309
by Yegor I. Vdovychenko
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Cyber space evolutionFull-text access may be available. Sign in or learn about subscription options.pp. 208-214
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Internal structure of software application for controlling devices via JTAG 1149 interfaceFull-text access may be available. Sign in or learn about subscription options.pp. 264-266
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Path delay faults and ENFFull-text access may be available. Sign in or learn about subscription options.pp. 164-167
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A process variation detection methodFull-text access may be available. Sign in or learn about subscription options.pp. 30-33
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Stable current and voltage generation under process variationFull-text access may be available. Sign in or learn about subscription options.pp. 40-42
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A technique of optimal built-in self-test circuitries generationFull-text access may be available. Sign in or learn about subscription options.pp. 145-148
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Information optimization of distributed net of receivers of acoustic noise type signalsFull-text access may be available. Sign in or learn about subscription options.pp. 324-325
by H.H. Asadov, N.A. Abdullayev, E.A. Ibrahimov, V.M. Garayev, E. Abbaszadeh
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Cluster computing framework based on transparent parallelizing technologyFull-text access may be available. Sign in or learn about subscription options.pp. 339-342
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