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2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

June 27 2022 to June 30 2022

McLean, VA, USA

ISBN: 978-1-6654-8532-6

Table of Contents

EnclaveSim:A Micro-architectural Simulator with Enclave SupportFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
Towards Attack Resilient Delay-Based Strong PUFsFull-text access may be available. Sign in or learn about subscription options.pp. 5-8
Security Properties Driven Pre-Silicon Laser Fault Injection AssessmentFull-text access may be available. Sign in or learn about subscription options.pp. 9-12
Structural Analysis Attack on Sequential Circuit Logic LockingFull-text access may be available. Sign in or learn about subscription options.pp. 21-24
A Novel Attack on Machine-Learning Resistant Physical Unclonable FunctionsFull-text access may be available. Sign in or learn about subscription options.pp. 25-28
System on Chip (SoC) Security Architecture Framework for Isolated Domains Against ThreatsFull-text access may be available. Sign in or learn about subscription options.pp. 29-32
Security Threats and Countermeasure Deployment Using Partial Reconfiguration in FPGA CAD ToolsFull-text access may be available. Sign in or learn about subscription options.pp. 33-36
Towards an Antivirus for Quantum ComputersFull-text access may be available. Sign in or learn about subscription options.pp. 37-40
SecSoC: A Secure System on Chip Architecture for IoT DevicesFull-text access may be available. Sign in or learn about subscription options.pp. 41-44
Characterizing Side-Channel Leakage of DNN Classifiers though Performance CountersFull-text access may be available. Sign in or learn about subscription options.pp. 45-48
Detecting Continuous Jamming Attack using Ultra-low Power RSSI CircuitFull-text access may be available. Sign in or learn about subscription options.pp. 49-52
Secuirty Metrics for Logic CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 53-56
SpecPref: High Performing Speculative Attacks Resilient Hardware PrefetchersFull-text access may be available. Sign in or learn about subscription options.pp. 57-60
Safeguarding Unmanned Aerial Vehicles Against Side Channel Analysis Via Motor Noise InjectionFull-text access may be available. Sign in or learn about subscription options.pp. 65-68
WiP: Applicability of ISO Standard Side-Channel Leakage Tests to NIST Post-Quantum CryptographyFull-text access may be available. Sign in or learn about subscription options.pp. 69-72
Chosen-Plaintext Attack on Energy-Efficient Hardware Implementation of GIFT-COFBFull-text access may be available. Sign in or learn about subscription options.pp. 73-76
Error Correction Attacks on BACnet MS/TPFull-text access may be available. Sign in or learn about subscription options.pp. 77-80
Insertion of random delay with context-aware dummy instructions generator in a RISC-V processorFull-text access may be available. Sign in or learn about subscription options.pp. 81-84
Efficient Targeted Bit-Flip Attack Against the Local Binary Pattern NetworkFull-text access may be available. Sign in or learn about subscription options.pp. 89-92
Dynamic Key Updates for LUT Locked DesignFull-text access may be available. Sign in or learn about subscription options.pp. 105-108
Metrics for Assessing Security of System-on-ChipFull-text access may be available. Sign in or learn about subscription options.pp. 113-116
FTC: A Universal Sensor for Fault Injection Attack DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 117-120
Hardware Trojan Detection at LUT: Where Structural Features Meet Behavioral CharacteristicsFull-text access may be available. Sign in or learn about subscription options.pp. 121-124
Security Analysis of Delay-Based Strong PUFs with Multiple Delay LinesFull-text access may be available. Sign in or learn about subscription options.pp. 125-128
On the Feasibility of Training-time Trojan Attacks through Hardware-based Faults in MemoryFull-text access may be available. Sign in or learn about subscription options.pp. 133-136
Hardening Hardware Accelerartor Based CNN Inference Phase Against Adversarial NoisesFull-text access may be available. Sign in or learn about subscription options.pp. 141-144
Global Attack and Remedy on IC-Specific Logic EncryptionFull-text access may be available. Sign in or learn about subscription options.pp. 145-148
Evaluating the Impact of Hardware Faults on Program Execution in a Microkernel EnvironmentFull-text access may be available. Sign in or learn about subscription options.pp. 149-152
Practical Performance of Analog Attack TechniquesFull-text access may be available. Sign in or learn about subscription options.pp. 153-156
Systolic Acceleration of Polynomial Multiplication for KEM Saber and Binary Ring-LWE Post-Quantum CryptographyFull-text access may be available. Sign in or learn about subscription options.pp. 157-160
A Lightweight Mutual Authentication Protocol Based on Physical Unclonable FunctionsFull-text access may be available. Sign in or learn about subscription options.pp. 161-164
Oblivious Intrusion Detection SystemFull-text access may be available. Sign in or learn about subscription options.pp. 165-168
A Modeling Attack on the Sub-threshold Current Array PUFFull-text access may be available. Sign in or learn about subscription options.pp. 169-172
Partial Reconfiguration for Run-time Memory Faults and Hardware Trojan Attacks DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 173-176
Securing Hardware Accelerator during High-level SynthesisFull-text access may be available. Sign in or learn about subscription options.pp. 177-180
PUF-based Secure Test Wrapper Design for Network-on-ChipFull-text access may be available. Sign in or learn about subscription options.pp. 181-184
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