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Proceedings
ICCD
ICCD 2020
Generate Citations
2020 IEEE 38th International Conference on Computer Design (ICCD)
Oct. 18 2020 to Oct. 21 2020
Hartford, CT
ISBN: 978-1-7281-9710-4
Table of Contents
Title Page i
Freely available from IEEE.
pp. 1-1
Title Page iii
Freely available from IEEE.
pp. 3-3
[Copyright notice]
Freely available from IEEE.
pp. 1-1
Table of Contents
Freely available from IEEE.
pp. v-xvii
Message from the General Chair ICCD 2020
Freely available from IEEE.
pp. 1-1
by
Maciej Ciesielski
Message from Program Chair
Freely available from IEEE.
pp. 19-19
Organizing Committee ICCD 2020
Freely available from IEEE.
pp. xx-xx
Program Committee ICCD 2020
Freely available from IEEE.
pp. xxi-xxv
Special Session Program Committee
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pp. 26-26
Tutorial
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pp. xxvii-xxvii
Keynote
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pp. 28-28
Sponsors
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pp. 29-29
Special Session: Impact of Noise on Quantum Algorithms in Noisy Intermediate-Scale Quantum Systems
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pp. 1-4
by
Daniel Volya
,
Prabhat Mishra
Special Session: Quantum Carry Lookahead Adders for NISQ and Quantum Image Processing
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pp. 5-8
by
Himanshu Thapliyal
,
Edgard Muñoz-Coreas
,
Vladislav Khalus
Special Session: Quantum Error Correction in Near Term Systems
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pp. 9-12
by
Ritajit Majumdar
,
Susmita Sur-Kolay
Special Session: Noise Characterization and Error Mitigation in Near-Term Quantum Computers
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pp. 13-16
by
Christopher J. Wood
Special Session: Adiabatic Circuits for Energy-Efficient and Secure IoT Systems
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pp. 17-20
by
Krithika Dhananjay
,
Emre Salman
Special Session: Exploring the Ultimate Limits of Adiabatic Circuits
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pp. 21-24
by
Michael P. Frank
,
Robert W. Brocato
,
Thomas M. Conte
,
Alexander H. Hsia
,
Anirudh Jain
,
Nancy A. Missert
,
Karpur Shukla
,
Brian D. Tierney
Special Session: A Novel Low-Power and Energy-Efficient Adiabatic Logic-In-Memory Architecture Using CMOS/MTJ
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pp. 25-28
by
Himanshu Thapliyal
,
S. Dinesh Kumar
Special Session: An Adiabatic Logic Based Silicon Physical Unclonable Function
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pp. 29-32
by
Kohei Ogura
,
Yasuhiro Takahashi
Special Session: Potentially Leaky Controller: Examining Cache Side-Channel Attacks in Programmable Logic Controllers
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pp. 33-36
by
Dimitrios Tychalas
,
Michail Maniatakos
Special Session: Physics- Informed Neural Networks for Securing Water Distribution Systems
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pp. 37-40
by
Solon Falas
,
Charalambos Konstantinou
,
Maria K. Michael
Special Issue: Resilient Distributed Estimator with Information Consensus for CPS Security
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pp. 41-44
by
Feng Yu
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Yaodan Hu
,
Teng Zhang
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Yier Jin
Special Session: Noninvasive Sensor-Spoofing Attacks on Embedded and Cyber-Physical Systems
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pp. 45-48
by
Anomadarshi Barua
,
Mohammad Abdullah Al Faruque
Special Session: Harness the Power of DERs for Secure Communications in Electric Energy Systems
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pp. 49-52
by
Ioannis Zografopoulos
,
Juan Ospina
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Charalambos Konstantinou
Special Session: XTA: Open Source eXtensible, Scalable and Adaptable Tensor Architecture for AI Acceleration
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pp. 53-56
by
Ravikumar V Chakaravarthy
,
Hua Jiang
Reconfigurable Dataflow Optimization for Spatiotemporal Spiking Neural Computation on Systolic Array Accelerators
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pp. 57-64
by
Jeong-Jun Lee
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Peng Li
DualFS: A Coordinative Flash File System with Flash Block Dual-mode Switching
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pp. 65-72
by
Bing Wu
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Mengye Peng
,
Dan Feng
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Wei Tong
Quantum-Proof Lightweight McEliece Cryptosystem Co-processor Design
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pp. 73-79
by
Rashmi Agrawal
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Lake Bu
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Michel A. Kinsy
Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration
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pp. 80-87
by
Jinwoo Kim
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Venkata Chaitanya Krishna Chekuri
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Nael Mizanur Rahman
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Majid Ahadi Dolatsara
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Hakki Torun
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Madhavan Swaminathan
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Saibal Mukhopadhyay
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Sung Kyu Lim
Driving Scenario Perception-Aware Computing System Design in Autonomous Vehicles
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pp. 88-95
by
Hengyu Zhao
,
Yubo Zhang
,
Pingfan Meng
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Hui Shi
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Li Erran Li
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Tiancheng Lou
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Jishen Zhao
MEPNTC: A Standard-Cell Library Design Scheme Extending the Minimum-Energy-Point Operation of Near-Z_$V_{th}$_Z Computing
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pp. 96-104
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Anuradha C. Ranasinghe
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Sabih H. Gerez
FAGR: An Efficient File-aware Graph Recovery Scheme for Erasure Coded Cloud Storage Systems
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pp. 105-112
by
Heming Zeng
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Chi Zhang
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Chentao Wu
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Gen Yang
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Jie Li
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Guangtao Xue
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Minyi Guo
An Efficient Hardware Architecture for Finding Frequent Items in Data Streams
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pp. 113-119
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Ali Ebrahim
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Jalal Khlaifat
NATSA: A Near-Data Processing Accelerator for Time Series Analysis
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pp. 120-129
by
Ivan Fernandez
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Ricardo Quislant
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Eladio Gutiérrez
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Oscar Plata
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Christina Giannoula
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Mohammed Alser
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Juan Gómez-Luna
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Onur Mutlu
MEISSA: Multiplying Matrices Efficiently in a Scalable Systolic Architecture
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pp. 130-137
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Bahar Asgari
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Ramyad Hadidi
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Hyesoon Kim
QuPAA: Exploiting Parallel and Adaptive Architecture to Scale up Quantum Computing
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pp. 138-145
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Yingxun Fu
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Yao Sun
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Tao Li
PBCCF: Accelerated Deduplication by Prefetching Backup Content Correlated Fingerprints
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pp. 146-154
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Yaobin Qin
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Xianbo Zhang
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David J. Lilja
EaD: a Collision-free and High Performance Deduplication Scheme for Flash Storage Systems
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pp. 155-162
by
Suzhen Wu
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Jindong Zhou
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Weidong Zhu
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Hong Jiang
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Zhijie Huang
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Zhirong Shen
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Bo Mao
COSMA: An Efficient Concurrency-Oriented Space Management Scheme for In-memory File Systems
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pp. 163-166
by
Chunhua Xiao
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Zipei Feng
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Ting Wu
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Lin Zhang
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XiaoXiang Fu
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WeiChen Liu
AetEC: Adaptive error-tolerant Erasure Coding Scheme Within SSDs
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pp. 167-174
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Tianqi Zhan
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Xianpeng Wang
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Dan Feng
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Wei Tong
An Empirical Study of Hybrid SSD with Optane and QLC Flash
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pp. 175-178
by
Hui Chen
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Yina Lv
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Changlong Li
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Shouzhen Gu
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Liang Shi
ASCHyRO: Automatic Fault Localization of SystemC HLS Designs Using a Hybrid Accurate Rank Ordering Technique
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pp. 179-186
by
Mehran Goli
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Alireza Mahzoon
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Rolf Drechsler
WoLFRaM: Enhancing Wear-Leveling and Fault Tolerance in Resistive Memories using Programmable Address Decoders
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pp. 187-196
by
Leonid Yavits
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Lois Orosa
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Suyash Mahar
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João Dinis Ferreira
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Mattan Erez
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Ran Ginosar
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Onur Mutlu
DPCLS: Improving Partial Cache Line Sparing with Dynamics for Memory Error Prevention
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pp. 197-204
by
Xiaoming Du
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Cong Li
Multiple Permanent Faults Mitigation Through Bit-Shuffling for Network-on-Chip Architecture
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pp. 205-212
by
Romain Mercier
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Cédric Killian
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Angeliki Kritikakou
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Youri Helen
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Daniel Chillet
ATT: A Fault-Tolerant ReRAM Accelerator for Attention-based Neural Networks
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pp. 213-221
by
Haoqiang Guo
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Lu Peng
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Jian Zhang
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Qing Chen
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Travis D LeCompte
APAC: An Accurate and Adaptive Prefetch Framework with Concurrent Memory Access Analysis
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pp. 222-229
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Xiaoyang Lu
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Rujia Wang
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Xian-He Sun
Reducing Off-Chip Miss Penalty by Exploiting Underutilised On-Chip Router Buffers
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pp. 230-238
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Abhijit Das
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Abhishek Kumar
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John Jose
Router Buffer Caching for Managing Shared Cache Blocks in Tiled Multi-Core Processors
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pp. 239-246
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Joe Augustine
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Raghavendra K
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John Jose
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Madhu Mutyam
A Study of Runtime Adaptive Prefetching for STTRAM L1 Caches
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pp. 247-254
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Kyle Kuan
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Tosiron Adegbija
Unified-TP: A Unified TLB and Page Table Cache Structure for Efficient Address Translation
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pp. 255-262
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Zhulin Ma
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Yujuan Tan
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Hong Jiang
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Zhichao Yan
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Duo Liu
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Xianzhang Chen
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Qingfeng Zhuge
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Edwin Hsing-Mean Sha
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Chengliang Wang
Runtime Deep Model Multiplexing for Reduced Latency and Energy Consumption Inference
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pp. 263-270
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Amir Erfan Eshratifar
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Massoud Pedram
Near-Sensor Inference Architecture with Region Aware Processing
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pp. 271-278
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Md Jubaer Hossain Pantho
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Pankaj Bhowmik
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Christophe Bobda
A Distributed In-Situ CNN Inference System for IoT Applications
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pp. 279-287
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Jiangsu Du
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Minghua Shen
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Yunfei Du
EdgeNAS: Discovering Efficient Neural Architectures for Edge Systems
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pp. 288-295
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Xiangzhong Luo
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Di Liu
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Hao Kong
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Weichen Liu
EM-GAN: Data-Driven Fast Stress Analysis for Multi-Segment Interconnects
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pp. 296-303
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Wentian Jin
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Sheriff Sadiqbatcha
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Zeyu Sun
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Han Zhou
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Sheldon X.-D. Tan
Maximum Clique Based Method for Optimal Solution of Pattern Classification
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pp. 304-311
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Xu He
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Yipei Wang
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Zhiyong Fu
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Yao Wang
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Yang Guo
Adaptive Simulation with Virtual Prototypes for RISC-V: Switching Between Fast and Accurate at Runtime
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pp. 312-315
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Vladimir Herdt
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Daniel Große
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Sören Tempel
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Rolf Drechsler
Throughput-Oriented Spatio-Temporal Optimization in Approximate High-Level Synthesis
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pp. 316-323
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Marcos T. Leipnitz
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Gabriel L. Nazar
Learn to Floorplan through Acquisition of Effective Local Search Heuristics
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pp. 324-331
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Zhuolun He
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Yuzhe Ma
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Lu Zhang
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Peiyu Liao
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Ngai Wong
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Bei Yu
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Martin D.F. Wong
4-output Programmable Spin Wave Logic Gate
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pp. 332-335
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Abdulqader Mahmoud
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Frederic Vanderveken
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Christoph Adelmann
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Said Hamdioui
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Sorin Cotofana
Bespoke Behavioral Processors
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pp. 336-339
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Rohit Sreekumar
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Prattay Chowdhury
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Hardware-based Fast Real-time Image Classification with Stochastic Computing
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pp. 340-347
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Ponnanna Kelettira Muthappa
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Florian Neugebauer
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Ilia Polian
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Scaled Population Subtraction for Approximate Computing
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pp. 348-355
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Kunal Bharathi
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Jiang Hu
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Sunil P. Khatri
Programmable Dictionary Code Compression for Instruction Stream Energy Efficiency
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pp. 356-363
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Joonas Multanen
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Kari Hepola
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Pekka Jääskeläinen
An Open-Source Scalable Thermal and Power Controller for HPC Processors
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pp. 364-367
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Giovanni Bambini
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Robert Balas
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Christian Conficoni
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Andrea Tilli
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Simone Benatti
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Andrea Bartolini
IPS-CiM: Enhancing Energy Efficiency of Intermittently-Powered Systems with Compute-in-Memory
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pp. 368-376
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Sandeep Krishna Thirumala
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Arnab Raha
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Improving the Efficiency of Power Management via Dynamic Interrupt Management
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pp. 377-380
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Ki-Dong Kang
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Hyungwon Park
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Gyeongseo Park
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Daehoon Kim
OpenCGRA: An Open-Source Unified Framework for Modeling, Testing, and Evaluating CGRAs
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pp. 381-388
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Cheng Tan
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Chenhao Xie
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Ang Li
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Kevin J. Barker
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Antonino Tumeo
PerfDBT: Efficient Performance Regression Testing of Dynamic Binary Translation
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pp. 389-392
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Jin Wu
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Jian Dong
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Ruili Fang
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Wenwen Wang
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Transforming Natural Language Specifications to Logical Forms for Hardware Verification
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Rahul Krishnamurthy
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Michael S. Hsiao
Accelerated Verification of Parametric Protocols with Decision Trees
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Yongjian Li
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Taifeng Cao
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David N. Jansen
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Jun Pang
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Xiaotao Wei
H2ORAM: Low Response Latency Optimized ORAM for Hybrid Memory Systems
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Wenpeng He
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Fang Wang
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Optimizing Data Placement for Hybrid SPM with SRAM and Racetrack Memory
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pp. 409-416
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Rui Xu
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Edwin H.-M. Sha
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Improving the Latency-Area Tradeoffs for DRAM Design with Coarse-Grained Monolithic 3D (M3D) Integration
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pp. 417-420
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Chao-Hsuan Huang
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Ishan G Thakkar
ADAM: Adaptive Block Placement with Metadata Embedding for Hybrid Caches
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pp. 421-424
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Beomjun Kim
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Prashant J. Nair
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Seokin Hong
A Fault-Tolerant and High-Speed Memory Controller Targeting 3D Flash Memory Cubes for Space Applications
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pp. 425-432
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Anthony Agnesina
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Da Eun Shim
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James Yamaguchi
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Christian Krutzik
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John Carson
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Dan Nakamura
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Sung Kyu Lim
A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard Cells
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pp. 433-440
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Ankit Wagle
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Sunil Khatri
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Sarma Vrudhula
On the Effects of Permanent Faults in QDI Circuits - A Quantitative Perspective
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Raghda El Shehaby
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Andreas Steininger
A Novel Rounding Algorithm for a High Performance IEEE 754 Double-Precision Floating-Point Multiplier
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pp. 445-452
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Rose R. Thompson
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James E. Stine
An Implementation of External Capacitor-less Low-DropOut Voltage Regulator in 45nm Technology with Output Voltage Ranging from 0.4V-1.2V
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pp. 453-456
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Farid Uddin Ahmed
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Zarin Tasnim Sandhie
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Masud H Chowdhury
Duty-Cycle Correction For A Super-Wide Frequency Range from 10MHz to 1.2GHz
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Wei Chu
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Wei-Hao Chen
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High Throughput CNN Inference and Training with In-Cache Computation
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Xiaowei Wang
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Li Zhao
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Pengcheng Li
Optimizing FPGA-Based CNN Accelerator Using Differentiable Neural Architecture Search
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Hongxiang Fan
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Martin Ferianc
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Shuanglong Liu
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Wayne Luk
Achieving Full Parallelism in LSTM via a Unified Accelerator Design
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pp. 469-477
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Xinyi Zhang
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Weiwen Jiang
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Jingtong Hu
A Hybrid Computing Architecture for Fault-tolerant Deep Learning Accelerators
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pp. 478-485
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Dawen Xu
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Cheng Chu
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Qianlong Wang
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Cheng Liu
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Ying Wang
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Lei Zhang
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Huaguo Liang
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Kwang-Ting Cheng
Dynamic Heterogeneous Voltage Regulation for Systolic Array-Based DNN Accelerators
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pp. 486-493
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Jianhao Chen
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Joseph Riad
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Edgar Sánchez-Sinencio
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Peng Li
CMSA: Configurable Multi-directional Systolic Array for Convolutional Neural Networks
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pp. 494-497
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Sheng Ma
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Yaohua Wang
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Thermal Aware Lifetime Reliability Optimization for Automotive Distributed Computing Applications
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pp. 498-505
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Ajinkya S. Bankar
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Shi Sha
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Vivek Chaturvedi
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Gang Quan
On-Chip Voltage and Temperature Digital Sensor for Security, Reliability, and Portability
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pp. 506-509
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Md Toufiq Hasan Anik
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Mohammad Ebrahimabadi
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Hamed Pirsiavash
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Jean-Luc Danger
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Sylvain Guilley
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Naghmeh Karimi
Re-Thinking Mixed-Criticality Architecture for Automotive Industry
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pp. 510-517
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Zhe Jiang
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Shuai Zhao
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Pan Dong
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Dawei Yang
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Ran Wei
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Nan Guan
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Neil Audsley
Design- Time Optimization of Reconfigurable PV Architectures for Irregular Surfaces
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pp. 518-524
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Sangyoung Park
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Swaminathan Narayanaswamy
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Samarjit Chakraborty
pacSCA: A Profiling-Assisted Correlation-based Side-Channel Attack on GPUs
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Xin Wang
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Wei Zhang
BranchSpec: Information Leakage Attacks Exploiting Speculative Branch Instruction Executions
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pp. 529-536
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Md Hafizul Islam Chowdhuryy
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Hang Liu
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Fan Yao
ND-HMDs: Non-Differentiable Hardware Malware Detectors against Evasive Transient Execution Attacks
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pp. 537-544
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Md Shohidul Islam
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Abraham Peedikayil Kuruvila
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Kanad Basu
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Khaled N. Khasawneh
Stealthy-Shutdown: Practical Remote Power Attacks in Multi - Tenant FPGAs
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pp. 545-552
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Yukui Luo
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Cheng Gongye
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Shaolei Ren
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Yunsi Fei
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Xiaolin Xu
Side-Channel Leakage Detection Based on Constant Parameter Channel Model
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pp. 553-560
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Wei Yang
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Hailong Zhang
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Yansong Gao
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Anmin Fu
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Songjie Wei
Improving the Performance of NVM Crash Consistency under Multicore
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pp. 561-564
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Zhiyuan Lu
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Jianhui Yue
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More Space may be Cheaper: Multi-Dimensional Resource Allocation for NVM-based Cloud Cache
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pp. 565-572
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Ning Bao
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Yunpeng Chai
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