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2020 IEEE 38th VLSI Test Symposium (VTS)

April 5 2020 to April 8 2020

San Diego, CA, USA

ISBN: 978-1-7281-5359-9

Table of Contents

VTS 2020 Title PageFreely available from IEEE.pp. i-i
[VTS 2020 Title Page]Freely available from IEEE.pp. i-i
VTS 2020 Copyright PageFreely available from IEEE.pp. i-i
VTS 2020 Breaker PageFreely available from IEEE.pp. i-ii
VTS 2020 Organizing CommitteeFreely available from IEEE.pp. i-iii
VTS 2020 Steering and Program CommitteesFreely available from IEEE.pp. i-i
[VTS 2020 Awards - 3 Awards]Freely available from IEEE.pp. i-iii
VTS 2020 KeynotesFreely available from IEEE.pp. i-iv
Non-Masking Non-Robust Tests for Path Delay FaultsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Irith Pomeranz
Effective Design of Layout-Friendly EDT DecompressorFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Yu Huang, Janusz Rajski, Mark Kassab, Nilanjan Mukherjee, Jeff Mayer
Input Test Data Volume Reduction Using Seed Complementation and Multiple LFSRsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Irith Pomeranz
In-field Functional Test of CAN Bus ControllersFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Riccardo Cantoro, Sandro Sartoni, Matteo Sonza Reorda
SNIFU: Secure Network Interception for Firmware Updates in legacy PLCsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Hadjer Benkraouda, Muhammad Ashif Chakkantakath, Anastasis Keliris, Michail Maniatakos
On Classification of Acceptable Images for Reliable Artificial Intelligence Systems: A Case Study on Pedestrian DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Tong-Yu Hsieh, Pin-Xuan Wu, Chun-Chao Cheng
ATTEST: Application-Agnostic Testing of a Novel Transistor-Level Programmable FabricFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Mustafa Munawar Shihab, Bharath Ramanidharan, Suraag Sunil Tellakula, Gaurav Rajavendra Reddy, Jingxian Tian, Carl Sechen, Yiorgos Makris
Mitigating Read Failures in STT-MRAMFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi B. Tahoori
Selective Checksum based On-line Error Correction for RRAM based Matrix OperationsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Abhishek Das, Nur A. Touba
Flush+Time: A High Accuracy and High Resolution Cache Attack On ARM-FPGA Embedded SoCFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Churan Tang, Pengkun Liu, Cunqing Ma, Zongbin Liu, Jingquan Ge
SafeTPU: A Verifiably Secure Hardware Accelerator for Deep Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Maria I. Mera Collantes, Zahra Ghodsi, Siddharth Garg
SeRFI: Secure Remote FPGA Initialization in an Untrusted EnvironmentFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Adam Duncan, Adib Nahiyan, Fahim Rahman, Grant Skipper, Martin Swany, Andrew Lukefahr, Farimah Farahmandi, Mark Tehranipoor
A Deterministic-Statistical Multiple-Defect Diagnosis MethodologyFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Soumya Mittal, R. D. Shawn Blanton
CNN-based Stochastic Regression for IDDQ Outlier IdentificationFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Chun-Teng Chen, Chia-Heng Yen, Cheng-Yen Wen, Cheng-Hao Yang, Kai-Chiang Wu, Mason Chern, Ying-Yen Chen, Chun-Yi Kuo, Jih-Nung Lee, Shu-Yi Kao, Mango Chia-Tso Chao
LSTM-based Analysis of Temporally- and Spatially-Correlated Signatures for Intermittent Fault DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Xingyi Wang, Li Jiang, Krishnendu Chakrabarty
A dynamic reconfiguration mechanism to increase the reliability of GPGPUsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Josie E. Rodriguez Condia, Pierpaolo Narducci, M. Sonza Reorda, L. Sterpone
Automated Design For Yield Through Defect ToleranceFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Suriyaprakash Natarajan, Andres F. Malavasi, Pascal A. Meinerzhagen
Aging-resilient SRAM design: an end-to-end frameworkFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Xuan Zuo, Sandeep K. Gupta
Reliability Evaluation of Turbo Decoders Implemented on SRAM-FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Zhen Gao, Lingling Zhang, Ruishi Han, Pedro Reviriego, Zhiqiang Li
ESL, Back-annotating Crosstalk Fault Models into High-level Communication LinksFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Katayoon Basharkhah, Rezgar Sadeghi, Nooshin Nosrati, Zainalabedin Navabi
Pinhole Latent Defect Modeling and Simulation for Defect-Oriented Analog/Mixed-Signal TestingFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Jhon Gomez, Nektar Xama, Anthony Coyette, Ronny Vanhooren, Wim Dobbelaere, Georges Gielen
Switch Level Time Simulation of CMOS Circuits with Adaptive Voltage and Frequency ScalingFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Eric Schneider, Hans-Joachim Wunderlich
Co-Optimization of Grid-Based TAM Wire Routing and Test Scheduling with Reconfigurable WrappersFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Jui-Hung Hung, Shih-Hsu Huang, Chun-Hua Cheng, Hsu-Yu Kao, Wei-Kai Cheng
Dynamic Multi-Frequency Test Method for Hidden Interconnect DefectsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Somayeh Sadeghi-Kohan, Sybille Hellebrand
Internal I/O Testing: Definition and a SolutionFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Sreejit Chakravarty, Fei Su, Indira A Gohad, Sudheer V Bandana, B S Adithya, Wei-Ming Lim
A Zero-Cost Detection Approach for Recycled ICs using Scan ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Wendong Wang, Ujjwal Guin, Adit Singh
DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan ChainFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan
Taming Combinational Trojan Detection Challenges with Self-Referencing Adaptive Test PatternsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Chris Nigh, Alex Orailoglu
Ultra-Wideband Modulation Signal Measurement Using Local Sweep Digitizing MethodFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Koji Asami, Keisuke Kusunoki, Nobuhiro Shimizu, Yoshiyuki Aoki
Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Brett Sparkman, Scott C. Smith, Jia Di
Quantile – Quantile Fitting Approach to Detect Site to Site Variations in Massive Multi-site TestingFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Praise O. Farayola, Shravan K. Chaganti, Abdullah O. Obaidi, Abalhassan Sheikh, Srivaths Ravi, Degang Chen
A New Secure Scan Design with PUF-based Key for AuthenticationFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Qidong Wang, Aijiao Cui, Gang Qu, Huawei Li
Sequence Triggered Hardware Trojan in Neural Network AcceleratorFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Zizhen Liu, Jing Ye, Xing Hu, Huawei Li, Xiaowei Li, Yu Hu
Low-Power Weighted Pseudo-Random Test Pattern Generation for Launch-on-Capture Delay TestingFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Dong Xiang, Jiaming Cai, Bo Liu
Special Session: Novel Attacks on Logic-LockingFull-text access may be available. Sign in or learn about subscription options.pp. 1-10
by Ayush Jain, Ujjwal Guin, M Tanjidur Rahman, Navid Asadizanjani, Danielle Duvalsaint, R. D. Shawn Blanton
Special Session: Physically Flexible Devices for Health and Activity Monitoring: Challenges from Design to TestFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by Yigit Tuncel, Ganapati Bhat, Umit Y. Ogras
Special Session – Emerging Memristor Based Memory and CIM Architecture: Test, Repair and Yield AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 1-10
by Rajendra Bishnoi, Lizhou Wu, Moritz Fieback, Christopher Münch, Sarath Mohanachandran Nair, Mehdi Tahoori, Ying Wang, Huawei Li, Said Hamdioui
Special Session: AutoSoC - A Suite of Open-Source Automotive SoC BenchmarksFull-text access may be available. Sign in or learn about subscription options.pp. 1-9
by Felipe Augusto da Silva, Ahmet Cagri Bagbaba, Annachiara Ruospo, Riccardo Mariani, Ghani Kanawati, Ernesto Sanchez, Matteo Sonza Reorda, Maksim Jenihhin, Said Hamdioui, Christian Sauer
Special Session: The Recent Advance in Hardware Implementation of Post-Quantum CryptographyFull-text access may be available. Sign in or learn about subscription options.pp. 1-10
by Jiafeng Xie, Kanad Basu, Kris Gaj, Ujjwal Guin
Special Session: Survey of Test Point Insertion for Logic Built-in Self-testFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Yang Sun, Spencer K. Millican, Vishwani D. Agrawal
Special Session: Test Challenges in a Chiplet MarketplaceFull-text access may be available. Sign in or learn about subscription options.pp. 1-12
by M. Hutner, R. Sethuram, B. Vinnakota, D. Armstrong, A. Copperhall
Innovative Test Practices in AsiaFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Takeshi Iwasaki, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Yukiya Miura, Smith Lai, Gavin Hung, Harry H. Chen, Haruo Kobayashi, Kazumi Hatayama
Innovative Practice on Wafer Test InnovationsFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Dyi-Chung Hu, Hirohito Hashimoto, Li-Fong Tseng, Ken Chau-Cheung Cheng, Katherine Shu-Min Li, Sying-Jyan Wang, Sean Y.-S. Chen, Jwu E Chen, Clark Liu, Andrew Huang
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