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24th International Conference on Distributed Computing Systems Workshops, 2004. Proceedings.

Mar. 23 2004 to Mar. 24 2004

Hachioji, Tokyo, Japan

ISBN: 0-7695-2087-1

Volume:

Table of Contents

Message from the DARES ChairFreely available from IEEE.pp. 0_18-0_18
Message from the WWAN ChairFreely available from IEEE.pp. 0_22-0_22
Workshop Committee membersFreely available from IEEE.pp. 0_24-1_5
Session 1: Hardware/Software Co-Design
Hardware-Software Co-Design of Resource Constrained Systems on a ChipFull-text access may be available. Sign in or learn about subscription options.pp. 818-823
Session 1: Hardware/Software Co-Design
Towards a Higher Level of Abstraction in Hardware/Software Co-SimulationFull-text access may be available. Sign in or learn about subscription options.pp. 824-830
Session 1: Hardware/Software Co-Design
Development Methodology of ASIP Based on Java Byte Code Using HW/SW Co-Design System for Processor DesignFull-text access may be available. Sign in or learn about subscription options.pp. 831-837
Session 1: Hardware/Software Co-Design
A SystemC-Based Modular Design and Verification Framework for C-Model Reuse in a HW/SW-Co-Design FlowFull-text access may be available. Sign in or learn about subscription options.pp. 838-843
Session 2: Scheduling
A Time Petri Net Approach for Finding Pre-Runtime Schedules in Embedded Hard Real-Time SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 846-851
Session 2: Scheduling
Scheduling Communication-Aware Tasks on Distributed Heterogeneous Computing SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 852-857
Session 2: Scheduling
A Scheduling Algorithm to Optimize Real-World ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 858-862
Session 3: Reconfigurable Computing
CODACS Prototype: CHIARA Language and Its CompilersFull-text access may be available. Sign in or learn about subscription options.pp. 864-870
Session 3: Reconfigurable Computing
Multiobjective Design of Embedded Processors on FPGA PlatformsFull-text access may be available. Sign in or learn about subscription options.pp. 871-875
Session 3: Reconfigurable Computing
On the Design of a Self-Reconfigurable SoPC Based Cryptographic EngineFull-text access may be available. Sign in or learn about subscription options.pp. 876-881
Session 4: Design and Test
Incorporating Timeliness in Atomic Write of Shared Data for Distributed Embedded SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 884-889
Session 4: Design and Test
Leakage Energy Reduction in Register RenamingFull-text access may be available. Sign in or learn about subscription options.pp. 890-895
Session 4: Design and Test
An Enhanced Buffer Management Scheme for Fast Handover ProtocolFull-text access may be available. Sign in or learn about subscription options.pp. 896-902
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