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9th Annual Workshop on Interaction between Compilers and Computer Architectures (INTERACT'05)

Feb. 13 2005 to Feb. 13 2005

San Francisco, USA

ISSN: 1550-6207

ISBN: 0-7695-2321-8

Table of Contents

Program Chair's messageFreely available from IEEE.pp. vi
I. Compiling for CMP
Compiler Analysis for Trace-Level Speculative Multithreaded ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 2-10
by Carlos Molina, Antonio Gonzalez, Jordi Tubella
I. Compiling for CMP
Multigrain Parallel Processing on Compiler Cooperative Chip MultiprocessorFull-text access may be available. Sign in or learn about subscription options.pp. 11-20
by Keiji Kimura, Yasutaka Wada, Hirufumi Nakano, Takeshi Kodaka, Jun Shirako, Kazuhisa Ishizaka, Hironori Kasahara
II. Compiling for Itanium Architecture
An Empirical Study of Data Speculation Use on the Intel Itanium 2 ProcessorFull-text access may be available. Sign in or learn about subscription options.pp. 22-33
by Markus Mock, Ricardo Villamarin, Jose Baiocchi
Compiler analysis for trace-level speculative multithreaded architecturesFull-text access may be available. Sign in or learn about subscription options.pp. 2-10
by C. Molina, A. Gonzalez, J. Tubella
II. Compiling for Itanium Architecture
Analyis of Path Profiling Information Generated with Performance Monitoring HardwareFull-text access may be available. Sign in or learn about subscription options.pp. 34-43
by Alex Shye, Matthew Iyer, Tipp Moseley, David Hodgdon, Dan Fay, Vijay Janapa Reddi, Daniel A. Connors
III. Data Cache Optimization Techniques
Cooperative Caching with Keep-Me and Evict-MeFull-text access may be available. Sign in or learn about subscription options.pp. 46-57
by Jennifer B. Sartor, Subramaniam Venkiteswaran, Kathryn S. McKinley, Zhenlin Wang
III. Data Cache Optimization Techniques
Hybrid Compiler and Microarchitecture Technique for Cache Traffic OptimizationFull-text access may be available. Sign in or learn about subscription options.pp. 58-69
by Mohamed Zahran, Anasua Bhowmik
III. Data Cache Optimization Techniques
A Tile Size Selection Analysis for Blocked Array LayoutsFull-text access may be available. Sign in or learn about subscription options.pp. 70-80
by Evangelia Athanasaki, Nectarios Koziris, Panayiotis Tsanakas
IV. Instrumentations and Compiler Optimizations
Automatic Low Overhead Program Instrumentation with the LOPI FrameworkFull-text access may be available. Sign in or learn about subscription options.pp. 82-93
by Simon Kågström, Håkan Grahn, Lars Lundberg
IV. Instrumentations and Compiler Optimizations
Optimizing Structures in Object Oriented ProgramsFull-text access may be available. Sign in or learn about subscription options.pp. 94-103
by Kaiyu Chen, Sun Chan, Roy Dz-Ching Ju, Peng Tu
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