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Proceedings
ISCA
ISCA 2018
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2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA)
June 1 2018 to June 6 2018
Los Angeles, CA, USA
Table of Contents
[Title page i]
Freely available from IEEE.
pp. 1-1
[Title page iii]
Freely available from IEEE.
pp. 3-3
[Copyright notice]
Freely available from IEEE.
pp. 4-4
Table of Contents
Freely available from IEEE.
pp. 5-13
Message from the ISCA 2018 General Co-Chairs
Freely available from IEEE.
pp. 14-15
Message from the ISCA 2018 Program Chair
Freely available from IEEE.
pp. 16-19
ISCA 2018 Organizing Committee
Freely available from IEEE.
pp. 20-20
ISCA 2018 Program Committee
Freely available from IEEE.
pp. 21-22
ISCA 2018 External Reviewers
Freely available from IEEE.
pp. 23-24
ISCA 2018 Sponsors
Freely available from IEEE.
pp. 25-26
A new golden age for computer architecture: Domain-specific hardware/software co-design, enhanced security, open instruction sets, and agile chip development
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pp. 27-29
A Configurable Cloud-Scale DNN Processor for Real-Time AI
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pp. 1-14
by
Jeremy Fowers
,
Kalin Ovtcharov
,
Michael Papamichael
,
Todd Massengill
,
Ming Liu
,
Daniel Lo
,
Shlomi Alkalay
,
Michael Haselman
,
Logan Adams
,
Mahdi Ghandi
,
Stephen Heil
,
Prerak Patel
,
Adam Sapek
,
Gabriel Weisz
,
Lisa Woods
,
Sitaram Lanka
,
Steven K. Reinhardt
,
Adrian M. Caulfield
,
Eric S. Chung
,
Doug Burger
Virtual Melting Temperature: Managing Server Load to Minimize Cooling Overhead with Phase Change Materials
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pp. 15-28
by
Matt Skach
,
Manish Arora
,
Dean Tullsen
,
Lingjia Tang
,
Jason Mars
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud
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pp. 29-42
by
Sagar Karandikar
,
Howard Mao
,
Donggyu Kim
,
David Biancolin
,
Alon Amid
,
Dayeol Lee
,
Nathan Pemberton
,
Emmanuel Amaro
,
Colin Schmidt
,
Aditya Chopra
,
Qijing Huang
,
Kyle Kovacs
,
Borivoje Nikolic
,
Randy Katz
,
Jonathan Bachrach
,
Krste Asanovic
PROMISE: An End-to-End Design of a Programmable Mixed-Signal Accelerator for Machine-Learning Algorithms
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pp. 43-56
by
Prakalp Srivastava
,
Mingu Kang
,
Sujan K. Gonugondla
,
Sungmin Lim
,
Jungwook Choi
,
Vikram Adve
,
Nam Sung Kim
,
Naresh Shanbhag
Computation Reuse in DNNs by Exploiting Input Similarity
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pp. 57-68
by
Marc Riera
,
Jose-Maria Arnau
,
Antonio Gonzalez
GenAx: A Genome Sequencing Accelerator
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pp. 69-82
by
Daichi Fujiki
,
Arun Subramaniyan
,
Tianjun Zhang
,
Yu Zeng
,
Reetuparna Das
,
David Blaauw
,
Satish Narayanasamy
Division of Labor: A More Effective Approach to Prefetching
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pp. 83-95
by
Sushant Kondguli
,
Michael Huang
Criticality Aware Tiered Cache Hierarchy: A Fundamental Relook at Multi-Level Cache Hierarchies
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pp. 96-109
by
Anant Vithal Nori
,
Jayesh Gaur
,
Siddharth Rai
,
Sreenivas Subramoney
,
Hong Wang
Rethinking Belady's Algorithm to Accommodate Prefetching
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pp. 110-123
by
Akanksha Jain
,
Calvin Lin
Constructing a Weak Memory Model
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pp. 124-137
by
Sizhuo Zhang
,
Muralidaran Vijayaraghavan
,
Andrew Wright
,
Mehdi Alipour
,
Arvind
A Hardware Accelerator for Tracing Garbage Collection
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pp. 138-151
by
Martin Maas
,
Krste Asanović
,
John Kubiatowicz
Charm: A Language for Closed-Form High-Level Architecture Modeling
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pp. 152-165
by
Weilong Cui
,
Yongshan Ding
,
Deeksha Dangwal
,
Adam Holmes
,
Joseph McMahan
,
Ali Javadi-Abhari
,
Georgios Tzimpragos
,
Frederic Chong
,
Timothy Sherwood
Get Out of the Valley: Power-Efficient Address Mapping for GPUs
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pp. 166-179
by
Yuxi Liu
,
Xia Zhao
,
Magnus Jahre
,
Zhenlin Wang
,
Xiaolin Wang
,
Yingwei Luo
,
Lieven Eeckhout
Scheduling Page Table Walks for Irregular GPU Applications
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pp. 180-192
by
Seunghee Shin
,
Guilherme Cox
,
Mark Oskin
,
Gabriel H. Loh
,
Yan Solihin
,
Abhishek Bhattacharjee
,
Arkaprava Basu
SEESAW: Using Superpages to Improve VIPT Caches
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pp. 193-206
by
Mayank Parasar
,
Abhishek Bhattacharjee
,
Tushar Krishna
A Case for Richer Cross-Layer Abstractions: Bridging the Semantic Gap with Expressive Memory
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pp. 207-220
by
Nandita Vijaykumar
,
Abhilasha Jain
,
Diptesh Majumdar
,
Kevin Hsieh
,
Gennady Pekhimenko
,
Eiman Ebrahimi
,
Nastaran Hajinazar
,
Phillip B. Gibbons
,
Onur Mutlu
Non-Speculative Store Coalescing in Total Store Order
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pp. 221-234
by
Alberto Ros
,
Stefanos Kaxiras
Dynamic Memory Dependence Predication
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pp. 235-246
by
Zhaoxiang Jin
,
Soner Önder
ProtoGen: Automatically Generating Directory Cache Coherence Protocols from Atomic Specifications
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pp. 247-260
by
Nicolai Oswald
,
Vijay Nagarajan
,
Daniel J. Sorin
Spandex: A Flexible Interface for Efficient Heterogeneous Coherence
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pp. 261-274
by
Johnathan Alsop
,
Matthew Sinclair
,
Sarita Adve
Flexon: A Flexible Digital Neuron for Efficient Spiking Neural Network Simulations
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pp. 275-288
by
Dayeol Lee
,
Gwangmu Lee
,
Dongup Kwon
,
Sunghwa Lee
,
Youngsok Kim
,
Jangwoo Kim
Space-Time Algebra: A Model for Neocortical Computation
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pp. 289-300
by
James Smith
Architecting a Stochastic Computing Unit with Molecular Optical Devices
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pp. 301-314
by
Xiangyu Zhang
,
Ramin Bashizade
,
Craig LaBoda
,
Chris Dwyer
,
Alvin R. Lebeck
Density Tradeoffs of Non-Volatile Memory as a Replacement for SRAM Based Last Level Cache
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pp. 315-327
by
Kunal Korgaonkar
,
Ishwar Bhati
,
Huichu Liu
,
Jayesh Gaur
,
Sasikanth Manipatruni
,
Sreenivas Subramoney
,
Tanay Karnik
,
Steven Swanson
,
Ian Young
,
Hong Wang
ACCORD: Enabling Associativity for Gigascale DRAM Caches by Coordinating Way-Install and Way-Prediction
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pp. 328-339
by
Vinson Young
,
Chiachen Chou
,
Aamer Jaleel
,
Moinuddin Qureshi
RANA: Towards Efficient Neural Acceleration with Refresh-Optimized Embedded DRAM
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pp. 340-352
by
Fengbin Tu
,
Weiwei Wu
,
Shouyi Yin
,
Leibo Liu
,
Shaojun Wei
Scaling Datacenter Accelerators with Compute-Reuse Architectures
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pp. 353-366
by
Adi Fuchs
,
David Wentzlaff
Enabling Scientific Computing on Memristive Accelerators
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pp. 367-382
by
Ben Feinberg
,
Uday Kumar Reddy Vengalam
,
Nathan Whitehair
,
Shibo Wang
,
Engin Ipek
Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks
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pp. 383-396
by
Charles Eckert
,
Xiaowei Wang
,
Jingcheng Wang
,
Arun Subramaniyan
,
Ravi Iyer
,
Dennis Sylvester
,
David Blaaauw
,
Reetuparna Das
FLIN: Enabling Fairness and Enhancing Performance in Modern NVMe Solid State Drives
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pp. 397-410
by
Arash Tavakkol
,
Mohammad Sadrosadati
,
Saugata Ghose
,
Jeremie Kim
,
Yixin Luo
,
Yaohua Wang
,
Nika Mansouri Ghiasi
,
Lois Orosa
,
Juan Gómez-Luna
,
Onur Mutlu
GraFBoost: Using Accelerated Flash Storage for External Graph Analytics
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pp. 411-424
by
Sang-Woo Jun
,
Andy Wright
,
Sizhuo Zhang
,
Shuotao Xu
,
Arvind
2B-SSD: The Case for Dual, Byte- and Block-Addressable Solid-State Drives
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pp. 425-438
by
Duck-Ho Bae
,
Insoon Jo
,
Youra Adel Choi
,
Joo-Young Hwang
,
Sangyeun Cho
,
Dong-Gi Lee
,
Jaeheon Jeong
Lazy Persistency: A High-Performing and Write-Efficient Software Persistency Technique
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pp. 439-451
by
Mohammad Alshboul
,
James Tuck
,
Yan Solihin
DHTM: Durable Hardware Transactional Memory
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pp. 452-465
by
Arpit Joshi
,
Vijay Nagarajan
,
Marcelo Cintra
,
Stratis Viglas
Hardware Supported Permission Checks on Persistent Objects for Performance and Programmability
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pp. 466-478
by
Tiancong Wang
,
Sakthikumaran Sambasivam
,
James Tuck
RoboX: An End-to-End Solution to Accelerate Autonomous Control in Robotics
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pp. 479-490
by
Jacob Sacks
,
Divya Mahajan
,
Richard C. Lawson
,
Behnam Khaleghi
,
Hadi Esmaeilzadeh
DCS-ctrl: A Fast and Flexible Device-Control Mechanism for Device-Centric Server Architecture
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pp. 491-504
by
Dongup Kwon
,
Jaehyung Ahn
,
Dongju Chae
,
Mohammadamin Ajdari
,
Jaewon Lee
,
Suheon Bae
,
Youngsok Kim
,
Jangwoo Kim
Yukta: Multilayer Resource Controllers to Maximize Efficiency
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pp. 505-518
by
Raghavendra Pradyumna Pothukuchi
,
Sweta Yamini Pothukuchi
,
Petros Voulgaris
,
Josep Torrellas
Exploring Predictive Replacement Policies for Instruction Cache and Branch Target Buffer
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pp. 519-532
by
Samira Mirbagher Ajorpaz
,
Elba Garza
,
Sangam Jindal
,
Daniel A. Jiménez
EVA²: Exploiting Temporal Redundancy in Live Computer Vision
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pp. 533-546
by
Mark Buckler
,
Philip Bedoukian
,
Suren Jayasuriya
,
Adrian Sampson
Euphrates: Algorithm-SoC Co-Design for Low-Power Mobile Continuous Vision
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pp. 547-560
by
Yuhao Zhu
,
Anand Samajdar
,
Matthew Mattina
,
Paul Whatmough
Guaranteeing Local Differential Privacy on Ultra-Low-Power Systems
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pp. 561-574
by
Woo-Seok Choi
,
Matthew Tomei
,
Jose Rodrigo Sanchez Vicarte
,
Pavan Kumar Hanumolu
,
Rakesh Kumar
Stitch: Fusible Heterogeneous Accelerators Enmeshed with Many-Core Architecture for Wearables
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pp. 575-587
by
Cheng Tan
,
Manupa Karunaratne
,
Tulika Mitra
,
Li-Shiuan Peh
Nonblocking Memory Refresh
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pp. 588-599
by
Kate Nguyen
,
Kehan Lyu
,
Xianze Meng
,
Vilas Sridharan
,
Xun Jian
Practical Memory Safety with REST
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pp. 600-611
by
Kanad Sinha
,
Simha Sethumadhavan
Mitigating Wordline Crosstalk Using Adaptive Trees of Counters
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pp. 612-623
by
Seyed Mohammad Seyedzadeh
,
Alex K. Jones
,
Rami Melhem
Mobilizing the Micro-Ops: Exploiting Context Sensitive Decoding for Security and Energy Efficiency
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pp. 624-637
by
Mohammadkazem Taram
,
Ashish Venkat
,
Dean Tullsen
Hiding Intermittent Information Leakage with Architectural Support for Blinking
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pp. 638-649
by
Alric Althoff
,
Joseph McMahan
,
Luis Vega
,
Scott Davidson
,
Timothy Sherwood
,
Michael Taylor
,
Ryan Kastner
GANAX: A Unified MIMD-SIMD Acceleration for Generative Adversarial Networks
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pp. 650-661
by
Amir Yazdanbakhsh
,
Hajar Falahati
,
Philip J. Wolfe
,
Hadi Esmaeilzadeh
,
Kambiz Samadi
SnaPEA: Predictive Early Activation for Reducing Computation in Deep Convolutional Neural Networks
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pp. 662-673
by
Vahideh Akhlaghi
,
Amir Yazdanbakhsh
,
Kambiz Samadi
,
Rajesh K. Gupta
,
Hadi Esmaeilzadeh
UCNN: Exploiting Computational Reuse in Deep Neural Networks via Weight Repetition
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pp. 674-687
by
Kartik Hegde
,
Jiyong Yu
,
Rohit Agrawal
,
Mengjia Yan
,
Michael Pellauer
,
Christopher Fletcher
Energy-Efficient Neural Network Accelerator Based on Outlier-Aware Low-Precision Computation
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pp. 688-698
by
Eunhyeok Park
,
Dongyoung Kim
,
Sungjoo Yoo
Synchronized Progress in Interconnection Networks (SPIN): A New Theory for Deadlock Freedom
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pp. 699-711
by
Aniruddh Ramrakhyani
,
Paul V. Gratz
,
Tushar Krishna
TCEP: Traffic Consolidation for Energy-Proportional High-Radix Networks
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pp. 712-725
by
Gwangsun Kim
,
Hayoung Choi
,
John Kim
Modular Routing Design for Chiplet-Based Systems
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pp. 726-738
by
Jieming Yin
,
Zhifeng Lin
,
Onur Kayiran
,
Matthew Poremba
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Muhammad Shoaib Bin Altaf
,
Natalie Enright Jerger
,
Gabriel H. Loh
FastTrack: Leveraging Heterogeneous FPGA Wires to Design Low-Cost High-Performance Soft NoCs
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pp. 739-751
by
Nachiket Kapre
,
Tushar Krishna
Prediction Based Execution on Deep Neural Networks
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pp. 752-763
by
Mingcong Song
,
Jiechen Zhao
,
Yang Hu
,
Jiaqi Zhang
,
Tao Li
Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Network
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pp. 764-775
by
Hardik Sharma
,
Jongse Park
,
Naveen Suda
,
Liangzhen Lai
,
Benson Chau
,
Joon Kyung Kim
,
Vikas Chandra
,
Hadi Esmaeilzadeh
Gist: Efficient Data Encoding for Deep Neural Network Training
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pp. 776-789
by
Animesh Jain
,
Amar Phanishayee
,
Jason Mars
,
Lingjia Tang
,
Gennady Pekhimenko
The Dark Side of DNN Pruning
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pp. 790-801
by
Reza Yazdani
,
Marc Riera
,
Jose-Maria Arnau
,
Antonio González
HetCore: TFET-CMOS Hetero-Device Architecture for CPUs and GPUs
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pp. 802-815
by
Bhargava Gopireddy
,
Dimitrios Skarlatos
,
Wenjuan Zhu
,
Josep Torrellas
RegMutex: Inter-Warp GPU Register Time-Sharing
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pp. 816-828
by
Farzad Khorasani
,
Hodjat Asghari Esfeden
,
Amin Farmahini-Farahani
,
Nuwan Jayasena
,
Vivek Sarkar
The Locality Descriptor: A Holistic Cross-Layer Abstraction to Express Data Locality In GPUs
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pp. 829-842
by
Nandita Vijaykumar
,
Eiman Ebrahimi
,
Kevin Hsieh
,
Phillip B. Gibbons
,
Onur Mutlu
Generic System Calls for GPUs
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pp. 843-856
by
Ján Veselý
,
Arkaprava Basu
,
Abhishek Bhattacharjee
,
Gabriel H. Loh
,
Mark Oskin
,
Steven K. Reinhardt
Author Index
Freely available from IEEE.
pp. 857-860
[Publisher's information]
Freely available from IEEE.
pp. 862-862
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