
Proceedings of 26th IEEE International Symposium on Multiple-Valued Logic (ISMVL'96)
Jan. 19 1996 to Jan. 31 1996
Jantiago de Compostela, SPAIN
ISSN: 0195-623X
ISBN: 0-8186-7392-3
Table of Contents
Session 1A: Logic Design I
Session 2A: Fault Modeling, Fault Diagnosis
Session 2A: Fault Modeling, Fault Diagnosis
Session 2A: Fault Modeling, Fault Diagnosis
Session 2B: Devices
Session 3A: Circuits, Logic Design I
Session 3A: Circuits, Logic Design I
Session 3A: Circuits, Logic Design I
Special Session: Helena Rasiowa, In Memoriam: Invited Speakers: G. Malinowski, J.M. Font, and T. Sales
Special Session: Helena Rasiowa, In Memoriam: Invited Speakers: G. Malinowski, J.M. Font, and T. Sales
Special Session: Helena Rasiowa, In Memoriam: Invited Speakers: G. Malinowski, J.M. Font, and T. Sales
Session 4B: Artificial Intelligence, Reasoning
Session 4B: Artificial Intelligence, Reasoning
Session 4B: Artificial Intelligence, Reasoning
Session 5A: Algebra II
Session 5B: Soft Computing
Session 6A: Circuits, Logic Design II
Session 6A: Circuits, Logic Design II
Session 6B: Decision Diagrams
Session 6B: Decision Diagrams
Session 7A: Algebra III
Session 7B: Logic III