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2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

July 8 2018 to July 11 2018

Hong Kong

Table of Contents

[Title page i]Freely available from IEEE.pp. 1-1
Title Page iiiFreely available from IEEE.pp. 3-3
Copyright PageFreely available from IEEE.pp. 4-4
Table of ContentsFreely available from IEEE.pp. 5-21
Message from the General ChairsFreely available from IEEE.pp. 22-22
Message from the Technical Program ChairsFreely available from IEEE.pp. 23-24
Conference CommitteesFreely available from IEEE.pp. 25-26
Technical Program CommitteeFreely available from IEEE.pp. 27-29
KeynotesFull-text access may be available. Sign in or learn about subscription options.pp. 30-38
Plenary TalksFull-text access may be available. Sign in or learn about subscription options.pp. 39-43
Gyrator-C Based Bandpass Filter with Improved Dynamic Range for Fully Integrated RF Front-EndFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by Lakshmi N S, Bhaskar M
Replica-Based Low Drop-Out Voltage Regulator with Assistant Power Transistors for Digital VLSI SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 6-9
by Yang Nan, Chenchang Zhan, Guanhua Wang, Linjun He, Han Li
Area Efficient NMOS Based Positive and Negative Voltage MultiplierFull-text access may be available. Sign in or learn about subscription options.pp. 10-15
by Vikas Rana
Achieving Low Power Classification with Classifier EnsembleFull-text access may be available. Sign in or learn about subscription options.pp. 16-21
by Fanglei Hu, Min Zhang, Hailong Jiao
A Power-Efficient Hybrid Architecture Design for Image Recognition Using CNNsFull-text access may be available. Sign in or learn about subscription options.pp. 22-27
by Jinhang Choi, Srivatsa Srinivasa, Yasuki Tanabe, Jack Sampson, Vijaykrishnan Narayanan
Towards Budget-Driven Hardware Optimization for Deep Convolutional Neural Networks Using Stochastic ComputingFull-text access may be available. Sign in or learn about subscription options.pp. 28-33
by Zhe Li, Ji Li, Ao Ren, Caiwen Ding, Jeffrey Draper, Qinru Qiu, Bo Yuan, Yanzhi Wang
Fast Heuristics for Near-Optimal Signal Restoration in Post-Silicon ValidationFull-text access may be available. Sign in or learn about subscription options.pp. 34-39
by Xiaobang Liu, Ranga Vemuri
PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks Using Cooperative CoevolutionFull-text access may be available. Sign in or learn about subscription options.pp. 40-45
by Sukanta Dey, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi
Silicon Debug with Maximally Expanded Internal Observability Using Nearest Neighbor AlgorithmFull-text access may be available. Sign in or learn about subscription options.pp. 46-51
by Ankit Jindal, Binod Kumar, Nitish Jindal, Masahiro Fujita, Virendra Singh
Application Specific Networks-on-Chip Synthesis: An Energy Efficient ApproachFull-text access may be available. Sign in or learn about subscription options.pp. 52-57
by Somayeh Kashi, Ahmad Patooghy, Dara Rahmati, Mahdi Fazeli, Michel A. Kinsy
Accurate Models for Optimizing Tapered Microchannel Heat Sinks in 3D ICsFull-text access may be available. Sign in or learn about subscription options.pp. 58-63
by Leslie Hwang, Beomjin Kwon, Martin Wong
Designing and Benchmarking of Double-Row Height Standard CellsFull-text access may be available. Sign in or learn about subscription options.pp. 64-69
by Yu-Xiang Chiang, Cheng-Wei Tai, Shang-Rong Fang, Kai-Chun Peng, Yuan-Dar Chung, Jin-Kai Yang, Rung-Bin Lin
A Dual-Threshold Scheme Along with Security Reinforcement for Energy Efficient Nonvolatile ProcessorsFull-text access may be available. Sign in or learn about subscription options.pp. 70-75
by Dongqin Zhou, Keni Qiu, Yuanchao Xu, Xin Shi, Yongpan Liu
A Comprehensive Electro-Optical Model for Silicon Photonic SwitchesFull-text access may be available. Sign in or learn about subscription options.pp. 76-81
by Xuanqi Chen, Zhifei Wang, Yi-Shing Chang, Jiang Xu, Peng Yang, Zhehui Wang, Luan H.K. Duong
CMOS Gates with Second FunctionFull-text access may be available. Sign in or learn about subscription options.pp. 82-87
by Jan Nevoral, Richard Ruzicka, Vaclav Simek
TDC: Tagless DRAM CacheFull-text access may be available. Sign in or learn about subscription options.pp. 88-93
by S R Swamy Saranam, Madhu Mutyam
CT-Cache: Compressed Tag-Driven Cache ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 94-99
by Haeyoon Cho, Joonho Kong, Arslan Munir, Naresh Kumar Giri
High Bandwidth Off-Chip Memory Access Through Hybrid Switching and Inter-Chip Wireless LinksFull-text access may be available. Sign in or learn about subscription options.pp. 100-105
by Sri Harsha Gade, Hemanta Kumar Mondal, Sujay Deb
Investigating Reliability and Security of Integrated Circuits and SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 106-111
by Qiaoyan Yu, Zhiming Zhang, Jaya Dofe
Reliability and Security in Non-volatile Processors, Two Sides of the Same CoinFull-text access may be available. Sign in or learn about subscription options.pp. 112-117
by Patrick Cronin, Chengmo Yang, Yongpan Liu
A Short Survey at the Intersection of Reliability and Security in Processor Architecture DesignsFull-text access may be available. Sign in or learn about subscription options.pp. 118-123
by Lake Bu, Miguel Mark, Michel A Kinsy
Can Soft Errors be Handled Securely?Full-text access may be available. Sign in or learn about subscription options.pp. 124-129
by Senwen Kan, Jennifer Dworak
BD-NET: A Multiplication-Less DNN with Binarized Depthwise Separable ConvolutionFull-text access may be available. Sign in or learn about subscription options.pp. 130-135
by Zhezhi He, Shaahin Angizi, Adnan Siraj Rakin, Deliang Fan
TaiJiNet: Towards Partial Binarized Convolutional Neural Network for Embedded SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 136-141
by Yingjian Ling, Kan Zhong, Yunsong Wu, Duo Liu, Jinting Ren, Renping Liu, Moming Duan, Weichen Liu, Liang Liang
An ECC-Free MLC STT-RAM Based Approximate Memory Design for Multimedia ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 142-147
by Zihao Liu, Tao Liu, Jie Guo, Nansong Wu, Wujie Wen
Robust Timing Attack Countermeasure on Virtual HardwareFull-text access may be available. Sign in or learn about subscription options.pp. 148-153
by Kai Yang, Jungmin Park, Mark Tehranipoor, Swarup Bhunia
Towards Theoretical Cost Limit of Stochastic Number Generators for Stochastic ComputingFull-text access may be available. Sign in or learn about subscription options.pp. 154-159
by Meng Yang, Bingzhe Li, David J. Lilja, Bo Yuan, Weikang Qian
Fully-on-Chip Digitally Assisted LDO Regulator with Improved Regulation and Transient ResponsesFull-text access may be available. Sign in or learn about subscription options.pp. 160-163
by Han Li, Chenchang Zhan, Ning Zhang
An Asynchronous Analog to Digital Converter for Surveillance Camera ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 164-169
by Siddharth R.K., Sunil R., Nithin Kumar Y.B., Vasantha M.H., Edoardo Bonizzoni
An Integrated MaxFit Genetic Algorithm-SPICE Framework for 2-Stage Op-Amp Design AutomationFull-text access may be available. Sign in or learn about subscription options.pp. 170-174
by Harsha M.V., B.P. Harish
Mismatch Resilient 3.5-Bit MDAC with MCS-CFCSFull-text access may be available. Sign in or learn about subscription options.pp. 175-180
by Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra
Design of Low Power SAR ADC Using Clock RetimingFull-text access may be available. Sign in or learn about subscription options.pp. 181-186
by S Jalaja, A M Vijaya Prakash
A 375 nA Input Off Current Schmitt Triger LDO for Energy Harvesting IoT SensorsFull-text access may be available. Sign in or learn about subscription options.pp. 187-190
by Koichiro Ishibashi, Shiho Takahashi
Precise Duty Cycle Variation Detection and Self-Calibration System for High-Speed Data LinksFull-text access may be available. Sign in or learn about subscription options.pp. 191-196
by Karen Khachikyan, Abraham Balabanyan, Hrachya Gumroyan
Parametric Circuit Optimization with Reinforcement LearningFull-text access may be available. Sign in or learn about subscription options.pp. 197-202
by Changcheng Tang, Zuochang Ye, Yan Wang
End-to-End Industrial Study of RetimingFull-text access may be available. Sign in or learn about subscription options.pp. 203-208
by Cunxi Yu, Chau-Chin Huang, Gi-Joon Nam, Mihir Choudhury, Victor N. Kravets, Andrew Sullivan, Maciej Ciesielski, Giovanni De Micheli
Communication-Aware Module Placement for Power Reduction in Large FPGA DesignsFull-text access may be available. Sign in or learn about subscription options.pp. 209-214
by Kalindu Herath, Alok Prakash, Udaree Kanewala, Thambipillai Srikanthan
A Novel Mixed-Size Fixed-Outline Floorplacement AlgorithmFull-text access may be available. Sign in or learn about subscription options.pp. 215-219
by Qian Chen, Sheqin Dong
ARCHVerifyr: An Embedded Software-Driven Approach for Architecture VerificationFull-text access may be available. Sign in or learn about subscription options.pp. 220-225
by Tomás Grimm, Djones Lettnin, Michael Hübner
High-Average and Guaranteed Performance for Wireless Networks-on-Chip ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 226-231
by Mohammad Baharloo, Ahmad Khonsari, Pouya Shiri, Iman Namdari, Dara Rahmati
Hardware Implementation of Reconfigurable Separable ConvolutionFull-text access may be available. Sign in or learn about subscription options.pp. 232-237
by Lei Rao, Bin Zhang, Jizhong Zhao
Low Overhead Online Checkpoint for Intermittently Powered Non-volatile FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 238-244
by Xinyi Zhang, Clay Patterson, Yongpan Liu, Chengmo Yang, Chun Jason Xue, Jingtiong Hu
Pixel-Parallel Architecture for Neuromorphic Smart Image Sensor with Visual AttentionFull-text access may be available. Sign in or learn about subscription options.pp. 245-250
by Md Jubaer Hossain Pantho, Pankaj Bhowmik, Christophe Bobda
Lightweight ASIC Implementation of AEGIS-128Full-text access may be available. Sign in or learn about subscription options.pp. 251-256
by Anubhab Baksi, Vikramkumar Pudi, Swagata Mandal, Anupam Chattopadhyay
Architecture Exploration and Delay Minimization Synthesis for SET-Based Programmable Gate ArraysFull-text access may be available. Sign in or learn about subscription options.pp. 257-262
by Chia-Cheng Wu, Kung-Han Ho, Juinn-Dar Huang, Chun-Yao Wang
MRAM-on-FDSOI Integration: A Bit-Cell PerspectiveFull-text access may be available. Sign in or learn about subscription options.pp. 263-268
by Hao Cai, You Wang, Wang Kang, Lirida Naviner, Xinning Liu, Jun Yang, Weisheng Zhao
High Performance Ternary Multiplier Using CNTFETFull-text access may be available. Sign in or learn about subscription options.pp. 269-274
by Subhendu Kumar Sahoo, Krishna Dhoot, Rasmita Sahoo
A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAMFull-text access may be available. Sign in or learn about subscription options.pp. 275-280
by Liuyang Zhang, Wang Kang, Hao Cai, Peng Ouyang, Lionel Torres, Youguang Zhang, Aida Todri-Sanial, Weisheng Zhao
Biosensing Performance Optimization of DMFET for Fully Filled and Partially Filled CavityFull-text access may be available. Sign in or learn about subscription options.pp. 281-286
by Ankita Porwal, Chitrakant Sahu
A Dynamic Resource Allocation Strategy for NoC Based Multicore Systems with Permanent FaultsFull-text access may be available. Sign in or learn about subscription options.pp. 287-292
by Suraj Paul, Navonil Chatterjee, Prasun Ghosal
Floorplanning in Graphene Nanoribbon (GNR) Based CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 293-298
by Subrata Das, Debesh Kumar Das
Generating Safety Guidance for Medical Injection with Three-Compartment Pharmacokinetics ModelFull-text access may be available. Sign in or learn about subscription options.pp. 299-304
by Cunxi Yu, Heinz Riener, Francesca Stradolini, Giovanni De Micheli
A Novel Approach for Nearest Neighbor Realization of 2D Quantum CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 305-310
by Anirban Bhattacharjee, Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman
A Hardware-Efficient Implementation of CLOC for On-chip Authenticated EncryptionFull-text access may be available. Sign in or learn about subscription options.pp. 311-315
by Mahmoud A. Elmohr, Sachin Kumar, Mustafa Khairallah, Anupam Chattopadhyay
0.9 to 2.5 GHz Sub-Sampling Receiver Architecture for Dynamically Reconfigurable SDRFull-text access may be available. Sign in or learn about subscription options.pp. 316-320
by Ajinkya Kale, Johannes Sturm, Vijaya Sankara Rao Pasupureddi
Hardware Obfuscation Using Strong PUFsFull-text access may be available. Sign in or learn about subscription options.pp. 321-326
by Soroush Khaleghi, Wenjing Rao
Multi-block APUF with 2-Level Voltage SupplyFull-text access may be available. Sign in or learn about subscription options.pp. 327-332
by Yunxi Guo, Timothy Dee, Akhilesh Tyagi
Write Energy Optimization for STT-MRAM Cache with Data Pattern CharacterizationFull-text access may be available. Sign in or learn about subscription options.pp. 333-338
by Bi Wu, Xiaolong Zhang, Yuanqing Cheng, Zhaohao Wang, Dijun Liu, Youguang Zhang, Weisheng Zhao
Time Stamp Based Scheduling for Energy Harvesting Systems with Hybrid Nonvolatile Hardware SupportFull-text access may be available. Sign in or learn about subscription options.pp. 339-344
by Xin Shi, Tongda Wu, Keni Qiu, Huazhong Yang, Yongpan Liu
EETD: An Energy Efficient Design for Runtime Hardware Trojan Detection in Untrusted Network-on-ChipFull-text access may be available. Sign in or learn about subscription options.pp. 345-350
by Mubashir Hussain, Amin Malekpour, Hui Guo, Sri Parameswaran
Combining Symbolic Computer Algebra and Boolean Satisfiability for Automatic Debugging and Fixing of Complex MultipliersFull-text access may be available. Sign in or learn about subscription options.pp. 351-356
by Alireza Mahzoon, Daniel Große, Rolf Drechsler
Enhancing Lifetime of PCM-Based Main Memory with Efficient Recovery of Stuck-at FaultsFull-text access may be available. Sign in or learn about subscription options.pp. 357-362
by Marjan Asadinia, Christophe Bobda
Guessing Your PIN Right: Unlocking Smartphones with Publicly Available Sensor DataFull-text access may be available. Sign in or learn about subscription options.pp. 363-368
by David Berend, Bernhard Jungk, Shivam Bhasin
Synthesis, Technology Mapping and Optimization for Emerging TechnologiesFull-text access may be available. Sign in or learn about subscription options.pp. 369-374
by Debjyoti Bhattacharjee, Anupam Chattopadhyay
Logic Synthesis for In-memory Computing Using Resistive MemoriesFull-text access may be available. Sign in or learn about subscription options.pp. 375-380
by Saeideh Shirinzadeh, Rolf Drechsler
Minimalistic Perspective to Public Key Implementations on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 381-386
by Debapriya Basu Roy, Debdeep Mukhopadhyay
Development of High-Stability, Low-Leakage 6Tr-SRAM with Single Data Line and Single Power Supply Using SOTB ProcessFull-text access may be available. Sign in or learn about subscription options.pp. 387-392
by Shin Miyamoto, Nobuaki Kobayashi
Exploiting Principle of Moving Target Defense to Secure FPGA SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 393-398
by Zhiming Zhang, Qiaoyan Yu
A Highly Flexible Lightweight and High Speed True Random Number Generator on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 399-404
by Faqiang Mei, Lei Zhang, Chongyan Gu, Yuan Cao, Chenghua Wang, Weiqiang Liu
LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware ProtectionFull-text access may be available. Sign in or learn about subscription options.pp. 405-410
by Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan
ArtiFact: Architecture and CAD Flow for Efficient Formal Verification of SoC Security PoliciesFull-text access may be available. Sign in or learn about subscription options.pp. 411-416
by Atul Prasad Deb Nath, Swarup Bhunia, Sandip Ray
Identifying Lithography Weak-Points of Standard Cells with Partial Pattern MatchingFull-text access may be available. Sign in or learn about subscription options.pp. 417-422
by Yongfu Li, I-Lun Tseng, Zhao Chuan Lee, Valerio Perez, Vikas Tripathi, Jonathan Yoong Seang Ong
Feature Based Coverage Analysis of AMS CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 423-428
by Antara Ain, Akshay Mambakam, Pallab Dasgupta
SAT Encoding-Based Verification of Sneak Path Problem in Via-Switch FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 429-434
by Ryutaro Doi, Masanori Hashimoto
RRAM Based Buffer Design for Energy Efficient CNN AcceleratorFull-text access may be available. Sign in or learn about subscription options.pp. 435-440
by Kaiyuan Guo, Jincheng Yu, Xuefei Ning, Yiming Hu, Yu Wang, Huazhong Yang
A Mixed-Mode Neuron with On-chip Tunability for Generic Use in Memristive Neuromorphic SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 441-446
by Sagarvarma Sayyaparaju, Ryan Weiss, Garrett S. Rose
Harnessing Emerging Technology for Compute-in-Memory SupportFull-text access may be available. Sign in or learn about subscription options.pp. 447-452
by Nicholas Jao, Akshay Krishna Ramanathan, Srivatsa Srinivasa, Sumitha George, John Sampson, Vijaykrishnan Narayanan
91dB Dynamic Range 9.5nW Low Pass Filter for Bio-Medical ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 453-457
by Jayaram Reddy M.K., Sreenivasulu Polineni, Laxminidhi Tonse
A Low Power, High Gain Semi-Floating Gate Amplifier for Resonating Sensors Front-EndFull-text access may be available. Sign in or learn about subscription options.pp. 458-463
by Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
A High-Efficient Current-Mode PWM DC-DC Buck Converter Using Dynamic Frequency ScalingFull-text access may be available. Sign in or learn about subscription options.pp. 464-469
by Ankit Rehani, Sujay Deb, Pydi Ganga Bahubalindruni, Bhavin Odedara, Srikanth Bojja
ReRise: An Adversarial Example Restoration System for Neuromorphic Computing SecurityFull-text access may be available. Sign in or learn about subscription options.pp. 470-475
by Chenchen Liu, Qide Dong, Fuxun Yu, Xiang Chen
MAT: A Multi-strength Adversarial Training Method to Mitigate Adversarial AttacksFull-text access may be available. Sign in or learn about subscription options.pp. 476-481
by Chang Song, Hsin-Pai Cheng, Huanrui Yang, Sicheng Li, Chunpeng Wu, Qing Wu, Yiran Chen, Hai Li
Hu-Fu: Hardware and Software Collaborative Attack Framework Against Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 482-487
by Wenshuo Li, Jincheng Yu, Xuefei Ning, Pengjun Wang, Qi Wei, Yu Wang, Huazhong Yang
Sparse VLSI Layout Feature Extraction: A Dictionary Learning ApproachFull-text access may be available. Sign in or learn about subscription options.pp. 488-493
by Hao Geng, Haoyu Yang, Bei Yu, Xingquan Li, Xuan Zeng
Pattern Similarity Metrics for Layout Pattern Classification and Their Validity Analysis by Lithographic ResponsesFull-text access may be available. Sign in or learn about subscription options.pp. 494-497
by Atsushi Takahashi, Shimpei Sato, Hiroki Ogura, Yu-Min Sung, Ting-Chi Wang
Recent Research and Challenges in Multiple Patterning Layout DecompositionFull-text access may be available. Sign in or learn about subscription options.pp. 498-499
by Iris Hui-Ru Jiang, Hua-Yu Chang
Guiding Template-Induced Design Challenges in DSA-MP LithographyFull-text access may be available. Sign in or learn about subscription options.pp. 500-502
by Shao-Yun Fang, Kuo-Hao Wu
FPAP: A Folded Architecture for Efficient Computing of Convolutional Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 503-508
by Yizhi Wang, Jun Lin, Zhongfeng Wang
Hyperdrive: A Systolically Scalable Binary-Weight CNN Inference Engine for mW IoT End-NodesFull-text access may be available. Sign in or learn about subscription options.pp. 509-515
by Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini
An Optimized Architecture For Decomposed Convolutional Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 516-521
by Fangxuan Sun, Jun Lin, Zhongfeng Wang
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