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2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

July 11 2016 to July 13 2016

Pittsburgh, PA, USA

Table of Contents

Title Page iFreely available from IEEE.pp. i-i
Title Page iiiFreely available from IEEE.pp. iii-iii
Copyright PageFreely available from IEEE.pp. iv-iv
Table of ContentsFreely available from IEEE.pp. v-xvi
Message from the General ChairsFreely available from IEEE.pp. xvii-xvii
Message from the Technical Program ChairsFreely available from IEEE.pp. xviii-xix
Organizing CommitteeFreely available from IEEE.pp. xx-xxi
Steering CommitteeFreely available from IEEE.pp. xxii-xxii
Technical Program Committee Track ChairsFreely available from IEEE.pp. xxiii-xxiii
Technical Program CommitteeFreely available from IEEE.pp. xxiv-xxvi
Additional ReviewersFreely available from IEEE.pp. xxvii-xxvii
Keynote abstracts [3 abstracts]Full-text access may be available. Sign in or learn about subscription options.pp. xxviii-xxxii
Panel Discussion: Nanotechnology-Inspired Future Computing, Challenges and OpportunitiesFreely available from IEEE.pp. xxxiii-xxxiii
A New Process Variation Monitoring CircuitFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by Davit Mirzoyan, Ararat Khachatryan
Mixed-Signal Design Using Digital CADFull-text access may be available. Sign in or learn about subscription options.pp. 6-11
by Vishnu Unnikrishnan, Mark Vesterbacka
An Integrated Common Gate CTLE Receiver Front End with Charge Mode AdaptationFull-text access may be available. Sign in or learn about subscription options.pp. 12-17
by Divya Duvvuri, Vijaya Sankara Rao Pasupureddi
FPGA Based Cyber Security Protocol for Automated Traffic Monitoring Systems: Proposal and ImplementationFull-text access may be available. Sign in or learn about subscription options.pp. 18-23
by Anupam Chattopadhyay, Vikramkumar Pudi, Anubhab Baksi, Thambipillai Srikanthan
Angel-Eye: A Complete Design Flow for Mapping CNN onto Customized HardwareFull-text access may be available. Sign in or learn about subscription options.pp. 24-29
by Kaiyuan Guo, Lingzhi Sui, Jiantao Qiu, Song Yao, Song Han, Yu Wang, Huazhong Yang
An Automated Hardware/Software Co-Design Flow for Partially Reconfigurable FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 30-35
by Shaon Yousuf, Ann Gordon-Ross
Speeding up Incremental Legalization with Fast Queries to Multidimensional TreesFull-text access may be available. Sign in or learn about subscription options.pp. 36-41
by Renan Netto, Vinicius Livramento, Chrystian Guth, Luiz C.V. Dos Santos, Jose Luis Guntzel
Timing Analysis and Optimization Based on Flexible Flip-Flop Timing ModelFull-text access may be available. Sign in or learn about subscription options.pp. 42-46
by Jeongwoo Heo, Taewhan Kim
Synthesizing Asynchronous Circuits toward Practical UseFull-text access may be available. Sign in or learn about subscription options.pp. 47-52
by Heechun Park, Taewhan Kim
Next Generation Automotive Architecture Modeling and Exploration for Autonomous DrivingFull-text access may be available. Sign in or learn about subscription options.pp. 53-58
by Bowen Zheng, Hengyi Liang, Qi Zhu, Huafeng Yu, Chung-Wei Lin
Online Unusual Behavior Detection for Temperature Sensor NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 59-62
by Hengyang Zhao, Sheldon X.-D. Tan, Hai Wang, Hai-Bao Chen
Security Challenges in CPS and IoT: From End-Node to the SystemFull-text access may be available. Sign in or learn about subscription options.pp. 63-68
by Kelvin Ly, Yier Jin
VLSI Architecture for Cyclostationary Feature Detection Based Spectrum Sensing for Cognitive-Radio Wireless Networks and Its ASIC ImplementationFull-text access may be available. Sign in or learn about subscription options.pp. 69-74
by Mahesh S. Murty, Rahul Shrestha
Generating Multi-cycle and Multiple Transient Fault Resilient Design During Physically Aware High Level SynthesisFull-text access may be available. Sign in or learn about subscription options.pp. 75-80
by Anirban Sengupta, Deepak Kachave
Power-Performance Optimization of a Virtualized SMT Vector Processor via Thread Fusion and Lane ConfigurationFull-text access may be available. Sign in or learn about subscription options.pp. 81-86
by Yaojie Lu, SeyedAmin Rooholamin, Sotirios G. Ziavras
A VLSI Design for Neuromorphic ComputingFull-text access may be available. Sign in or learn about subscription options.pp. 87-92
by Mark E. Dean, Christopher Daffron
Reducing the Model Order of Deep Neural Networks Using Information TheoryFull-text access may be available. Sign in or learn about subscription options.pp. 93-98
by Ming Tu, Visar Berisha, Yu Cao, Jae-Sun Seo
A Reconfigurable Array Architecture for NMLFull-text access may be available. Sign in or learn about subscription options.pp. 99-104
by G. Causapruno, U. Garlando, F. Cairo, M. Zamboni, M. Graziano
Design and Analysis of Novel InSb/Si Heterojunction Double Gate Tunnel Field Effect TransistorFull-text access may be available. Sign in or learn about subscription options.pp. 105-109
by S. Ahish, Dheeraj Sharma, M. H. Vasantha, Y. B. N. Kumar
A Memristor Crossbar Based Computing Engine Optimized for High Speed and AccuracyFull-text access may be available. Sign in or learn about subscription options.pp. 110-115
by Chenchen Liu, Qing Yang, Bonan Yan, Jianlei Yang, Xiaocong Du, Weijie Zhu, Hao Jiang, Qing Wu, Mark Barnell, Hai Li
Design of Division Circuits for Stochastic ComputingFull-text access may be available. Sign in or learn about subscription options.pp. 116-121
by Te-Hsuan Chen, John P. Hayes
Adaptive Filter Design Using Stochastic CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 122-127
by Honglan Jiang, Chengkun Shen, Pieter Jonker, Fabrizio Lombardi, Jie Han
High-Accuracy FIR Filter Design Using Stochastic ComputingFull-text access may be available. Sign in or learn about subscription options.pp. 128-133
by Bo Yuan, Yanzhi Wang
Design and Characterization of the TERO-PUF on SRAM FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 134-139
by Cédric Marchand, Lilian Bossuet, Abdelkarim Cherkaoui
Hardware/Software Isolation and Protection Architecture for Transparent Security Enforcement in Networked DevicesFull-text access may be available. Sign in or learn about subscription options.pp. 140-145
by Festus Hategekimana, Pierre Nardin, Christophe Bobda
A Gracefully Degrading and Energy-Efficient Fault Tolerant NoC Using Spare CoreFull-text access may be available. Sign in or learn about subscription options.pp. 146-151
by B. Naresh Kumar Reddy, M. H. Vasantha, Y.B. Nithin Kumar
Analyzing Imprecise Adders Using BDDs -- A Case StudyFull-text access may be available. Sign in or learn about subscription options.pp. 152-157
by Cunxi Yu, Maciej Ciesielski
Post-Placement Optimization for Thermal-Induced Mechanical Stress ReductionFull-text access may be available. Sign in or learn about subscription options.pp. 158-163
by Tiantao Lu, Zhiyuan Yang, Ankur Srivastava
Impact of VT and Body-Biasing on Resistive Short Detection in 28nm UTBB FDSOI -- LVT and RVT ConfigurationsFull-text access may be available. Sign in or learn about subscription options.pp. 164-169
by Amit Karel, Mariane Comte, Jean-Marc Galliere, Florence Azais, Michel Renovell
Low Cost VLSI Architecture for Sample Adaptive Offset Encoder in HEVCFull-text access may be available. Sign in or learn about subscription options.pp. 170-175
by Sayed El Gendy, Ahmed Shalaby, Mohammed S. Sayed
Dynamic Per-Warp Reconvergence Stack for Efficient Control Flow Handling in GPUsFull-text access may be available. Sign in or learn about subscription options.pp. 176-181
by Yaohua Wang, Xiaowen Chen, Dong Wang, Sheng Liu
Subthreshold Passive RFID Tag's Baseband Processor Core Design with Custom Modules and CellsFull-text access may be available. Sign in or learn about subscription options.pp. 182-187
by Weiwei Shi, Zhao Guangdong, Chiu-Sing Choy
Selective Enhancement of Randomness at the Materials Level: Poly-Si Based Physical Unclonable Functions (PUFs)Full-text access may be available. Sign in or learn about subscription options.pp. 188-193
by Hao-Ting Shen, Fahim Rahman, Bicky Shakya, Mark Tehranipoor, Domenic Forte
A Designer's Rationale for Nanoelectronic Hardware Security PrimitivesFull-text access may be available. Sign in or learn about subscription options.pp. 194-199
by Garrett S. Rose, Mesbah Uddin, Md. Badruddoja Majumder
Hardware Security Challenges Beyond CMOS: Attacks and RemediesFull-text access may be available. Sign in or learn about subscription options.pp. 200-205
by Kaveh Shamsi, Wujie Wen, Yier Jin
Attacking an SRAM-Based PUF through WearoutFull-text access may be available. Sign in or learn about subscription options.pp. 206-211
by Alec Roelke, Mircea R. Stan
Techniques for Improved Reliability in Memristive Crossbar PUF CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 212-217
by Mesbah Uddin, Md. Badruddoja Majumder, Garrett S. Rose, Karsten Beckmann, Harika Manem, Zahiruddin Alamgir, Nathaniel C. Cady
LLPA: Logic State Based Leakage Power AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 218-223
by Siva Nishok Dhanuskodi, Shahrzad Keshavarz, Daniel Holcomb
Hardware Design Automation of Convolutional Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 224-229
by Andrea Solazzo, Emanuele Del Sozzo, Irene De Rose, Matteo De Silvestri, Gianluca C. Durelli, Marco D. Santambrogio
Low-Power Wearable System for Real-Time Screening of Obstructive Sleep ApneaFull-text access may be available. Sign in or learn about subscription options.pp. 230-235
by Grégoire Surrel, Francisco Rincón, Srinivasan Murali, David Atienza
YodaNN: An Ultra-Low Power Convolutional Neural Network Accelerator Based on Binary WeightsFull-text access may be available. Sign in or learn about subscription options.pp. 236-241
by Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini
Workload-Aware Power Gating Design and Run-Time Management for Massively Parallel GPGPUsFull-text access may be available. Sign in or learn about subscription options.pp. 242-247
by Kapil Dev, Sherief Reda, Indrani Paul, Wei Huang, Wayne Burleson
Write Pulse Scaling for Energy Efficient STT-MRAMFull-text access may be available. Sign in or learn about subscription options.pp. 248-253
by Yousra Alkabani, Zach Koopmans, Haifeng Xu, Alex K. Jones, Rami Melhem
Hardware Trust through Layout Filling: A Hardware Trojan Prevention TechniqueFull-text access may be available. Sign in or learn about subscription options.pp. 254-259
by Papa-Sidy Ba, Sophie Dupuis, Manikandan Palanichamy, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
Computing in Ribosomes: Performing Boolean Logic Using mRNA-Ribosome SystemFull-text access may be available. Sign in or learn about subscription options.pp. 260-265
by Pratima Chatterjee, Mayukh Sarkar, Prasun Ghosal
Efficient Low-Density Parity-Check (LDPC) Code Decoding for Combating Asymmetric Errors in STT-RAMFull-text access may be available. Sign in or learn about subscription options.pp. 266-271
by Bohua Li, Yukui Pei, Wujie Wen
System Design for In-Hardware STDP Learning and Spiking Based Probablistic InferenceFull-text access may be available. Sign in or learn about subscription options.pp. 272-277
by Khadeer Ahmed, Amar Shrestha, Yanzhi Wang, Qinru Qiu
A Hybrid Algorithm to Conservatively Check the Robustness of CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 278-283
by Niels Thole, Görschwin Fey, Alberto Garcia-Ortiz
Formal Verification Using Don't-Care and Vanishing PolynomialsFull-text access may be available. Sign in or learn about subscription options.pp. 284-289
by Cunxi Yu, Maciej Ciesielski
Routing-Aware Incremental Timing-Driven PlacementFull-text access may be available. Sign in or learn about subscription options.pp. 290-295
by Jucemar Monteiro, Nima Karimpour Darav, Guilherme Flach, Mateus Fogaça, Ricardo Reis, Andrew Kennings, Marcelo Johann, Laleh Behjat
Design and Performance Evaluation of Approximate Floating-Point MultipliersFull-text access may be available. Sign in or learn about subscription options.pp. 296-301
by Peipei Yin, Chenghua Wang, Weiqiang Liu, Fabrizio Lombardi
Energy-Efficient Design of the Secure Better Portable Graphics Compression Architecture for Trusted Image Communication in the IoTFull-text access may be available. Sign in or learn about subscription options.pp. 302-307
by Umar Albalawi, Saraju P. Mohanty, Elias Kougianos
Energy-Efficient and Secure S-Box Circuit Using Symmetric Pass Gate Adiabatic LogicFull-text access may be available. Sign in or learn about subscription options.pp. 308-313
by S. Dinesh Kumar, Himanshu Thapliyal, Azhar Mohammad, Vijay Singh, Kalyan S. Perumalla
Scalable Integer DCT Architecture for HEVC EncoderFull-text access may be available. Sign in or learn about subscription options.pp. 314-318
by Maher Abdelrasoul, Mohammed S. Sayed, Victor Goulart
An Improved Approach for the Synthesis of Boolean Functions Using Memristor Based IMPLY and INVERSE-IMPLY GatesFull-text access may be available. Sign in or learn about subscription options.pp. 319-324
by F. Lalchhandama, Brojo Gopal Sapui, Kamalika Datta
Adaptive Overclocking and Error Correction Based on Dynamic Speculation WindowFull-text access may be available. Sign in or learn about subscription options.pp. 325-330
by Rengarajan Ragavan, Cedric Killian, Olivier Sentieys
On-Chip Delay Measurement Circuit for Reliability Characterization of SRAMFull-text access may be available. Sign in or learn about subscription options.pp. 331-336
by Pankaj Verma, Rohit Halba, Hemant Patel, Maryam Shojaei Baghini
Digital LDO with Time-Interleaved Comparators for Fast Response and Low RippleFull-text access may be available. Sign in or learn about subscription options.pp. 337-342
by Saurav Maji, Sohail Ahasan, Kaushik Roy, Mrigank Sharad
Design of Low Power 5-Bit Hybrid Flash ADCFull-text access may be available. Sign in or learn about subscription options.pp. 343-348
by S.M. Mayur, R.K. Siddharth, Y.B. Nithin Kumar, M.H. Vasantha
An Accurate All CMOS Temperature Sensor for IoT ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 349-354
by Sunil Kumar Maddikatla, Srivatsava Jandhyala
Design of Low-Power High-Gain Operational Amplifier for Bio-Medical ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 355-360
by Sanjay Singh Rajput, Ashish Singh, Ashwani K. Chandel, Rajeevan Chandel
A Compact Set of Seeds for LFSR-Based Test Generation from a Fully-Specified Compact Test SetFull-text access may be available. Sign in or learn about subscription options.pp. 361-366
by Irith Pomeranz
Low-Power and High Performance Sinusoidal Clocked Dynamic Circuit DesignFull-text access may be available. Sign in or learn about subscription options.pp. 367-372
by Raghava Katreepalli, Hemanth Chemanchula, Themistoklis Haniotakis, Yiorgos Tsiatouhas
Approximate Adder with Hybrid Prediction and Error Compensation TechniqueFull-text access may be available. Sign in or learn about subscription options.pp. 373-378
by Xinghua Yang, Yue Xing, Fei Qiao, Qi Wei, Huazhong Yang
SecCheck: A Trustworthy System with Untrusted ComponentsFull-text access may be available. Sign in or learn about subscription options.pp. 379-384
by Rajshekar Kalayappan, Smruti R. Sarangi
A Multi-accuracy-Level Approximate Memory Architecture Based on Data Significance AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 385-390
by Yuanchang Chen, Xinghua Yang, Fei Qiao, Jie Han, Qi Wei, Huazhong Yang
On Area-Efficient Implementation of Data Delays in 7 Series Xilinx FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 391-396
by Marek Parfieniuk, Sang Yoon Park
Phase-Based Dynamic Instruction Window Optimization for Embedded SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 397-402
by Tosiron Adegbija, Ann Gordon-Ross
Skybridge-3D-CMOS: A Vertically-Composed Fine-Grained 3D CMOS Integrated Circuit TechnologyFull-text access may be available. Sign in or learn about subscription options.pp. 403-408
by Mingyu Li, Jiajun Shi, Mostafizur Rahman, Santosh Khasanvis, Sachin Bhat, Csaba Andras Moritz
Fault-Tolerant FPGA with Column-Based Redundancy and Power Gating Using RRAMFull-text access may be available. Sign in or learn about subscription options.pp. 409-414
by Kibum Lee, S. Simon Wong
Accurate Synthesis of Arithmetic Operations with Stochastic LogicFull-text access may be available. Sign in or learn about subscription options.pp. 415-420
by Ensar Vahapoglu, Mustafa Altun
A Low-Leakage, Robust ESD Clamp with Thyristor Delay Element in 65 nm CMOS TechnologyFull-text access may be available. Sign in or learn about subscription options.pp. 421-425
by Mahdi Elghazali, Manoj Sachdev, Ajoy Opal
Mod (2P-1) Shuffle Memory-Access Instructions for FFTs on Vector SIMD DSPsFull-text access may be available. Sign in or learn about subscription options.pp. 426-430
by Sheng Liu, Hanyan Chen, Jianghua Wan, Yaohua Wang
Energy Optimization of Racetrack Memory-Based SIMON Block CipherFull-text access may be available. Sign in or learn about subscription options.pp. 431-436
by Suman Deb, Anupam Chattopadhyay, Hao Yu
Power-Delay-Area Performance Modeling and Analysis for Nano-Crossbar ArraysFull-text access may be available. Sign in or learn about subscription options.pp. 437-442
by Muhammed Ceylan Morgul, Furkan Peker, Mustafa Altun
Threshold-Dependent Camouflaged Cells to Secure Circuits Against Reverse Engineering AttacksFull-text access may be available. Sign in or learn about subscription options.pp. 443-448
by Maria I. Mera Collantes, Mohamed El Massad, Siddharth Garg
On the Design of Ultra-High Density 14nm Finfet Based Transistor-Level Monolithic 3D ICsFull-text access may be available. Sign in or learn about subscription options.pp. 449-454
by Jiajun Shi, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Csaba Andras Moritz
A Real-Time and Energy-Efficient Implementation of Difference-of-Gaussian with Flexible Thin-Film TransistorsFull-text access may be available. Sign in or learn about subscription options.pp. 455-460
by Nan Wu, Zheyu Liu, Fei Qiao, Qi Wei, Xiaojun Guo, Yuan Xie, Huazhong Yang
A Configurable and Lightweight Timing Monitor for Fault Attack DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 461-466
by Chinmay Deshpande, Bilgiday Yuce, Nahid Farhady Ghalaty, Dinesh Ganta, Patrick Schaumont, Leyla Nazhandali
Gate Overdrive with Split-Circuit Biasing to Substitute for Body Biasing in FinFET and UTB FDSOI CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 467-472
by Andrew Whetzel, Mircea R. Stan
Analysis of Switching Energy and Delay for Magnetic Logic DevicesFull-text access may be available. Sign in or learn about subscription options.pp. 473-478
by Madhav Rao, Neha Oraon
A 90-nm CMOS Frequency Synthesizer with a Tripler for 60-GHz Wireless Communication SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 479-483
by Po-Tsang Chen, Ching-Yuan Yang
A System-Level Exploration of Power Delivery Architectures for Near-Threshold Manycores Considering Performance ConstraintsFull-text access may be available. Sign in or learn about subscription options.pp. 484-489
by Ioannis Stamelakos, Amin Khajeh, Ahmed Eltawil, Gianluca Palermo, Cristina Silvano, Fadi Kurdahi
Fault-Tolerant Clock Synchronization with High PrecisionFull-text access may be available. Sign in or learn about subscription options.pp. 490-495
by Attila Kinali, Florian Huemer, Christoph Lenzen
STA: A Highly Scalable Low Latency Butterfly Fat Tree Based 3D NoC DesignFull-text access may be available. Sign in or learn about subscription options.pp. 496-501
by Avik Bose, Prasun Ghosal, Saraju P. Mohanty
Leveraging Compiler Support on VLIW Processors for Efficient Power GatingFull-text access may be available. Sign in or learn about subscription options.pp. 502-507
by Juan S. P. Giraldo, Luigi Carro, Stephan Wong, Antonio C. S. Beck
MINLP Based Power Optimization for Pipelined ADCFull-text access may be available. Sign in or learn about subscription options.pp. 508-511
by A. Purushothaman
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